RAM-Based TCAM Verification Circuit
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Solution Overview
Problem
Complex emulation of wider and/or deeper ternary content-addressable memory (TCAM) in digital logic can lead to errors and incorrect emulation, particularly when implementing TCAMs in integrated circuits.
Innovation Solution
A verification circuit is integrated into an integrated circuit (IC) to decode and check ternary rules stored in random access memory (RAM), ensuring accurate emulation by generating data and mask words or error bits, thereby validating the correctness of match vectors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If wider and/or deeper TCAMs are implemented using complex digital logic emulation, then the TCAM capacity is increased, but the emulation accuracy deteriorates due to errors and incorrect emulation
Solution Approach 1:
The patent segments the TCAM emulation into multiple RAM blocks, where each RAM block stores match vectors for a subset of ternary rules. This segmentation allows verification of individual RAM blocks independently, improving reliability while maintaining large TCAM capacity. The verification circuit can systematically check each segment without being overwhelmed by the complexity of the entire TCAM structure.
Solution Approach 2:
The patent introduces a verification circuit as an intermediary between the RAM-based TCAM emulation and the system that requires accurate TCAM functionality. This verification circuit decodes ternary rules from the match vectors stored in RAM and checks them against expected values, acting as a mediator that ensures emulation accuracy without requiring changes to the core TCAM emulation architecture.
2Reliability
If verification circuit is added to decode and check ternary rules in RAM-based TCAM, then emulation accuracy is improved, but device complexity increases
Solution Approach 1:
The patent extracts the verification function into a separate, dedicated verification circuit that is distinct from the main TCAM emulation logic. This extraction allows the verification circuit to be optimized independently, using simple comparison logic that checks match vectors against expected patterns. By separating verification from emulation, the patent improves reliability without significantly increasing the complexity of the core TCAM functionality.
Solution Approach 2:
The verification circuit uses copying of the ternary rule data from the match vectors in RAM to expected rule patterns stored in verification memory. This copying approach allows for straightforward comparison without complex decoding logic, as the verification circuit simply compares copied data against known correct values, thereby improving reliability with minimal additional complexity.
Data Source
AI summary
In an example, an integrated circuit (IC) includes a memory including at least one random access memory (RAM). Each of the at least one RAM stores bits representing match vectors indicative of whether search keys match ternary rules. The IC further includes a verification circuit, coupled to the memory, operable to verify the bits stored in the at least one RAM by performing at least one of: decoding at least one of the ternary rules from the bits stored in the at least one RAM; or checking the bits stored in the at least one RAM against expected content of at least one of the ternary rules.