Ramp DAC Display Driving for Lower Pixel Charging Loss
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Solution Overview
Problem
Current display drivers face inefficiencies in power usage due to continuous charging and discharging of pixel capacitors, leading to dynamic power losses as they provide voltage levels for each frame of image data.
Innovation Solution
Implementing a ramp digital-to-analog converter (DAC) circuit with a multiplexer to control the coupling of voltage output to data lines, ensuring the capacitor is only charged briefly before reaching the specified voltage level, and using multiple DAC circuits for increased flexibility and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If voltage levels are provided to each pixel circuit via data lines for every frame of image data, then image data can be displayed at higher refresh rates, but power consumption increases
Solution Approach 1:
The pixel circuit capacitor is pre-charged to the target voltage level before the frame period ends, so that when the next frame begins, the capacitor is already ready to maintain the correct voltage level without requiring full recharging, thus reducing power consumption while maintaining high refresh rates
Solution Approach 2:
The display driver uses periodic ramp DAC outputs that generate voltage levels in a repeating sequence, allowing the system to anticipate future voltage requirements and prepare capacitors in advance during each frame period, reducing the energy needed for voltage transitions
2Measurement precision
If the ramp DAC circuit outputs voltage continuously until the specified voltage level is reached, then accurate voltage levels are provided to pixel circuits, but dynamic power losses increase due to continuous charging and discharging
Solution Approach 1:
The system anticipates the voltage level needed for the next frame and couples the ramp DAC output to the pixel circuit capacitor in advance, just before the voltage reaches the specified level, allowing the capacitor to be charged to the target voltage without requiring a full charge-discharge cycle, thus reducing dynamic power loss while maintaining voltage accuracy
Solution Approach 2:
The pixel circuit capacitor maintains its charge between frames without requiring continuous discharge and recharge cycles, as the system strategically times the coupling of the ramp DAC output to provide voltage just when needed, allowing the capacitor to serve itself by holding charge rather than requiring active management through full cycles
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces dynamic power losses by minimizing the duration of capacitor charging and discharging, thereby enhancing the overall power efficiency of the display driver.
Implementation Method 1
The ramp DAC circuit may output a number of voltages according to a linear or non-linear function
Implementation Method 2
the display driver may include a circuit component (e.g., multiplexer) that controls when the voltage output of the ramp DAC circuit is coupled to a respective data line
Implementation Method 3
the respective pixel circuit may first be discharged and coupled to the ramp DAC circuit again until the voltage output of the ramp DAC circuit reaches a specified voltage level
Data Source
AI summary
A display device may include rows of pixels that displays image data on a display, data lines coupled to the rows of pixels, and a digital-to-analog converter (DAC) that outputs a ramp voltage signal including a data voltage to be depicted on a first pixel of the rows of pixels. The display device may also include a capacitor that receives the ramp voltage signal via the DAC and a circuit that sends a control signal to a circuit component that causes the DAC to couple to the capacitor via one of the data lines for a duration of time that comprises a first time when the ramp voltage signal is below the data voltage and a second time when the ramp voltage signal is approximately equal to the data voltage. The capacitor is coupled to the DAC when the ramp voltage signal is greater than zero.