Ramp Generator Capacitive Divider Low Noise Image Sensor

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Solution Overview

Problem

CMOS image sensors face challenges with horizontal noise and power supply rejection ratio due to row-wise analog to digital converters, and high analog power consumption, which affects image quality and noise performance.

Innovation Solution

A ramp generator with a capacitive voltage divider is used to reduce noise by providing a differential ramp output with a large output voltage swing, and a fully differential ramp generator with capacitive voltage dividers is implemented to improve power supply rejection ratio and reduce noise in readout circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If row-wise analog to digital converters are used in CMOS image sensors, then the readout structure can be implemented, but horizontal noise increases and power supply rejection ratio deteriorates

Engineering Contradiction:

Improvereadout capabilityVSAvoidhorizontal noise

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent transitions from row-wise ramp generators to column-wise ramp generators, changing the spatial dimension of signal processing. This dimensional shift allows each column to have its own dedicated ramp generator, eliminating the shared row-wise structure that causes horizontal noise propagation across the image sensor output.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the ramp generation function into separate column-wise units rather than using a single row-wise generator. Each column gets its own ramp generator, segmenting the noise source and preventing horizontal noise propagation across different columns of the image sensor output.

Inventive Principle:

Principle #1Segmentation

2Reliability

If high analog VDD voltage (2.8V) is used to support full well signals, then pixel output capability is maintained, but power consumption increases

Engineering Contradiction:

Improvepixel output capabilityVSAvoidanalog power consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the voltage parameter from high analog VDD (2.8V) to low analog VDD by implementing differential signaling and capacitive voltage dividers. This parameter transformation allows the system to maintain full well signal capability while operating at lower voltage, thereby reducing power consumption proportional to the voltage squared.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces capacitive voltage dividers as intermediary elements that enable voltage transformation and signal conditioning. These intermediaries allow the system to interface between the low voltage differential domain and the high voltage single-ended domain, maintaining signal integrity while reducing power consumption.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Device complexity

If single-ended ramp generators are used, then circuit simplicity is maintained, but power supply rejection ratio deteriorates causing horizontal banding

Engineering Contradiction:

Improvecircuit simplicityVSAvoidhorizontal banding due to power supply ripple

Core Design Contradiction:

Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent inverts the conventional single-ended ramp generator approach by using differential ramp generators. Instead of generating a single-ended ramp signal that is susceptible to power supply ripple, the system generates complementary differential ramp signals that inherently reject common-mode noise including power supply variations, eliminating horizontal banding artifacts.

Inventive Principle:

Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces noise and improves power supply rejection ratio, enabling lower analog VDD supply voltage while maintaining low noise performance, suitable for future image sensor designs with reduced pixel output ranges.

Implementation Method 1

the ramp generator has a relatively large output voltage swing on the output ramp signal received with a capacitive voltage divider to reduce noise. The output voltage swing of the ramp signal is reduced by the capacitive voltage divider

Methodology Applied

Scientific EffectCapacitive voltage divider: Capacitance

Implementation Method 2

a fully differential ramp generator with capacitive voltage dividers is implemented to improve power supply rejection ratio and reduce noise in readout circuits

Methodology Applied

Scientific EffectPower supply rejection:

Data Source

PatentUS9554074B2Ramp generator for low noise image sensor

Publication Date: 2017.01.24 OMNIVISION TECHNOLOGIES INC

AI summary

A readout circuit for use in an image sensor includes a sense amplifier circuit coupled to a bitline to sense analog image data from a pixel cell of the image sensor. An analog to digital converter is coupled to the sense amplifier circuit to convert the analog image data to digital image data. A ramp generator circuit is coupled to generate a first ramp signal. The analog to digital converter is coupled to generate the digital image data in response to the analog image data and the first ramp signal. A first capacitive voltage divider is coupled to the ramp generator. The first capacitive voltage divider is coupled to reduce an output voltage swing of the first ramp signal coupled to be received by the analog to digital converter to reduce noise in the first ramp signal.