Ramp Generator Circuit for Solid-State Imaging Gain Control
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Solution Overview
Problem
Existing analog-to-digital converter (ADC) circuits, particularly single-slope ADCs in solid-state imaging devices, face challenges in achieving fine gain adjustment and securing a wide variable range for ramp signal slope control, leading to restricted voltage ranges and increased power consumption, which limits noise reduction and image quality.
Innovation Solution
A ramp generator circuit that utilizes a reference signal generator, clock control, and variable gain circuits to adjust the slope and amplitude of the ramp signal by multiplying clock frequencies and controlling voltage differences, allowing for continuous gain adjustment and reduced power consumption while minimizing noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the slope of the ramp signal is increased by increasing the difference between start voltage and end voltage, then the conversion speed is improved, but the voltage range is restricted to the power supply voltage range
Solution Approach 1:
The patent applies dynamics by making the ramp signal characteristics adjustable through a variable gain circuit that can dynamically change the gain factor based on control signals. This allows the system to adapt the ramp signal amplitude and slope to different operating conditions while staying within the power supply voltage range, resolving the contradiction between speed and adaptability.
Solution Approach 2:
The patent changes parameters by introducing a variable gain factor that can be adjusted to modify the ramp signal characteristics. By controlling the gain factor, the system can achieve different conversion speeds and voltage ranges without being limited by the fixed power supply voltage, thus resolving the technical contradiction.
2Power
If the full-scale current is increased to control the slope, then the maximum voltage range is restricted, but power consumption increases
Solution Approach 1:
The patent changes the approach from directly increasing full-scale current to using a variable gain factor that can be adjusted to achieve the desired slope control. This parameter change allows for efficient power usage while maintaining the capability to control the ramp signal slope across different operating conditions.
Solution Approach 2:
The variable gain circuit provides dynamic control over the ramp signal characteristics, allowing the system to adjust power consumption based on the actual conversion requirements. This dynamic approach prevents unnecessary power consumption while maintaining slope control capability when needed.
3Measurement precision
If the resolution of the ADC is increased for higher image quality, then the gain adjustment accuracy requirement increases, but the circuit complexity increases
Solution Approach 1:
The patent segments the gain control into discrete steps using a variable gain circuit with selectable gain factors. This segmentation approach provides sufficient accuracy for high-resolution ADC operation while avoiding the complexity of fully continuous gain adjustment, thus resolving the contradiction between precision and complexity.
Data Source
AI summary
A ramp generator circuit includes: a reference signal generator circuit which generates a ramp waveform having a slope obtained by multiplication using a power of 2 according to a value of a higher order bit of a gain control signal; a clock control circuit which selectively outputs 2^m kinds of fractional-N clocks according to one of 2^m (natural number) areas obtained by dividing a code range represented by a lower order bit, when a negative gain is set; and a variable gain circuit which sets a ramp waveform according to the value of the gain control signal, and sets a ramp signal amplitude in each area so that a period ratio between ramp driving clocks for adjacent areas and a ratio between an amplitude of a ramp signal when the standard gain is set and a largest amplitude of a ramp signal are equal.