Ramp Generator for DC-DC Converter Mode Transition

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Solution Overview

Problem

Constant on-time DC-DC converters experience DC offset and chattering between conduction modes due to differences in ramp voltage and inductor current shapes, leading to inefficiencies and output ripple, which are not adequately addressed by current methods.

Innovation Solution

A ramp generator that softly resets the valley points of the positive and negative ramp voltages to a common voltage, adjusting their levels to match the inductor current slew rates and creating hysteresis at the conduction mode boundary to prevent multiple pulses and chattering.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an integrator is added to correct the DC offset error, then the output voltage accuracy is improved, but the device complexity increases and transient response deteriorates

Engineering Contradiction:
Improveoutput voltage accuracyVSAvoidconverter complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the source of the DC offset error by redesigning the ramp generator to produce a ramp voltage with the same shape as the inductor current. This removes the need for the integrator circuit that was previously required to correct the offset, thereby reducing device complexity while maintaining output voltage accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies preliminary action by pre-shaping the ramp voltage waveform to match the inductor current shape before the comparison operation occurs. This preliminary waveform matching prevents the DC offset from occurring in the first place, eliminating the need for subsequent correction circuits and improving transient response.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If the ramp voltage shape differs from the inductor current shape, then the control simplicity is maintained, but chattering occurs at the DCM/CCM boundary

Engineering Contradiction:
Improvecontrol simplicityVSAvoidmode transition stability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent changes the key parameter of the ramp voltage waveform (its shape) to match the inductor current shape. This parameter change eliminates the slew rate differences that cause chattering at mode boundaries, achieving reliable transitions while maintaining control simplicity through the constant on-time scheme.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If multiple pulses are generated in DCM mode, then the constant on-time control is simple to implement, but output ripple increases

Engineering Contradiction:
Improvecontrol circuit complexityVSAvoidoutput ripple
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent applies dynamics by making the ramp voltage waveform dynamically adapt to match the inductor current waveform characteristics. This dynamic waveform matching ensures that only single pulses are generated in DCM mode, eliminating the multiple pulse issue while maintaining the simplicity of constant on-time control implementation.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11646651B2Ramp generator for a constant on-time DC-DC converter
Publication Date: 2023.05.09 REED SEMICON CORP
  • US11646651B2 patent drawing
  • US11646651B2 patent drawing

AI summary

A ramp generator for a constant on-time DC-DC converter, wherein the ramp generator is configured to reduce DC offset and smooth transitions between conduction modes. The ramp voltage generator includes a common voltage generator suitable for generating a common voltage; a first ramp voltage generation block suitable for generating a first ramp voltage responsive to a first switching signal and a control signal, wherein the first switching signal resets one or more valley points of the first ramp voltage to one or more valley points of the common voltage; and a second ramp voltage generation block suitable for generating a second ramp voltage responsive to a second switching signal, the first ramp voltage, and the control signal.