Ramp Oscillator Setpoint Feedback for Temperature-Stable Clocks

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Solution Overview

Problem

Existing oscillators that generate binary periodic signals, such as clock signals, are sensitive to temperature variations, leading to undesirable frequency changes due to propagation time changes in voltage comparators.

Innovation Solution

The oscillator design includes a circuit that modulates the setpoint voltage based on the maximum value of the voltage ramps, comparing them with a voltage benchmark adjusted by subtracting the difference between the reference voltage and the maximum ramp value, thereby stabilizing the frequency despite temperature changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If voltage comparators are used to generate periodic signals, then the oscillator can generate binary periodic signals, but the frequency becomes sensitive to temperature variations due to propagation time changes in the comparators

Engineering Contradiction:
Improvefrequency stabilityVSAvoidtemperature sensitivity
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements feedback by measuring the actual maximum voltage reached by the ramp signal and using this measurement to adjust the setpoint voltage for the next ramp cycle. This closed-loop feedback mechanism compensates for temperature-induced propagation time variations in the comparators, maintaining stable frequency despite temperature changes.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically changes the setpoint voltage parameter based on the measured maximum ramp voltage. By adjusting this critical parameter in response to temperature variations (which affect propagation time), the system maintains consistent frequency output. The setpoint voltage is modified to account for the deviation caused by temperature-sensitive comparator behavior.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the setpoint voltage is fixed, then the oscillator circuit is simple, but the frequency varies with temperature due to comparator propagation time changes

Engineering Contradiction:
Improvecircuit simplicityVSAvoidfrequency stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent adds a feedback mechanism that measures the maximum ramp voltage and adjusts the setpoint voltage accordingly. This feedback loop introduces additional circuit elements (voltage storage, comparison, and adjustment components) but maintains frequency stability by compensating for temperature effects on comparator propagation time.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The oscillator circuit uses its own output ramp signal to generate the correction needed for frequency stabilization. The maximum voltage of the ramp itself serves as the reference for adjusting the setpoint, making the system self-regulating without requiring external temperature sensors or complex control mechanisms.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP4002689A1Oscillator
Publication Date: 2022.05.25 STMICROELECTRONICS (ROUSSET) SAS
  • EP4002689A1 patent drawingFigure 1~2
  • EP4002689A1 patent drawingFigure 3~4
  • EP4002689A1 patent drawingFigure 5~7

AI summary

This description relates to a device (2) comprising: a first ramp generator (100) (Vcl) and a second second ramp generator (102) (Vc2); a circuit (COMP') configured to provide a first signal (out1) representative of the comparison of each first ramp (Vcl) with a setpoint (Vref') and to provide a second signal (out2) representative of the comparison of each second ramp (Vc2) with the setpoint; a circuit (210) configured, on the basis of these signals (out1, out2), to: stop a first ramp (Vcl) and start a second ramp (Vc2) when the first ramp reaches the setpoint (Vref'), and stop a second ramp (Vc2) and start a first ramp (Vcl) when the second ramp reaches the setpoint (Vref'); and a circuit (200) configured to modulate the setpoint (Vref') from a maximum value of the last ramp (Vc1, Vc2) compared to the setpoint.