Ramped Voltage Sensing for MLC Memory Read Speed

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Solution Overview

Problem

Multilevel cell (MLC) non-volatile memory devices require multiple read operations to determine the state of cells with increasing threshold voltage levels, leading to decreased performance and increased read time, as the number of levels stored on a cell increases, posing a challenge for memory manufacturers to keep pace with advancing computer system performance.

Innovation Solution

A sensing method that biases the control gates of memory cells with a ramped voltage, allowing a single read operation to determine the state of MLC cells by comparing the bit line voltage to a reference threshold voltage, using a sense amplifier to perform multiple comparisons simultaneously, thereby reducing the need for multiple read operations and enhancing read operation speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple read operations are performed to determine the state of MLC cells with increasing threshold voltage levels, then measurement precision is improved, but read time increases and performance decreases

Engineering Contradiction:
Improvedetermination accuracy of memory cell stateVSAvoidread time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent combines multiple read operations into a single integrated operation. By applying a ramped voltage to the control gate that sweeps through multiple threshold voltage levels sequentially, the sense amplifier can determine the memory cell state across all levels in one operation, eliminating the need for separate read operations for each threshold level.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs a dynamic ramped voltage signal applied to the control gate instead of static voltage levels. The voltage ramps from an initial level through multiple threshold voltage levels to a final level, allowing the memory cell to be evaluated across all states during a single dynamic operation, thereby reducing total read time while maintaining measurement precision.

Inventive Principle:
Principle #15Dynamics

2Quantity of substance

If the number of threshold voltage levels stored on MLC cells increases, then memory capacity is improved, but the number of read operations required increases and performance decreases

Engineering Contradiction:
Improvememory capacityVSAvoidmemory performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent merges multiple read operations that would otherwise be required to evaluate each threshold voltage level into a single operation. The ramped voltage signal sequentially activates memory cells at different threshold levels during one continuous operation, allowing the sense amplifier to determine the cell state across all stored levels simultaneously, thus maintaining high memory capacity while improving performance.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies a preliminary ramped voltage signal that prepares and evaluates the memory cell across all threshold levels before a read operation is considered complete. This preliminary action ensures that the sense amplifier has sufficient time to detect the cell state at each threshold level during the voltage ramp, enabling accurate determination of multi-level cell states in a single operation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8179724B2Sensing for memory read and program verify operations in a non-volatile memory device
Publication Date: 2012.05.15 MICRON TECHNOLOGY INC
  • US8179724B2 patent drawing
  • US8179724B2 patent drawing
  • US8179724B2 patent drawing

AI summary

Methods for sensing in a memory device and a memory device are disclosed. In one such sensing method, a single read operation with multiple sense amplifier circuit comparisons to a reference threshold level are performed to determine a state of a selected memory cell. A ramped voltage turns on the selected memory cell when the ramped voltage reaches the threshold voltage to which the selected memory cell is programmed. In one embodiment, the turned on memory cell discharges its respective bit line.