Random Bit Cell With Non-Volatile Storage For Stable PUF
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Solution Overview
Problem
Existing random bit cells using SRAM for physical unclonable functions generate volatile random numbers, making them unstable due to ambient noise and power resets, which compromises security systems.
Innovation Solution
A random bit cell design incorporating a latch, voltage selector, and non-volatile storage elements, where the latch settles local bit lines to reference voltages and the voltage selector couples storage elements to program or pre-charge terminals to track and store initial charge states, enabling stable non-volatile random bit generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SRAM latch is used to generate random numbers based on unpredictable initial charge status, then random number generation capability is achieved, but the random numbers become volatile and unstable due to power resets and ambient noise
Solution Approach 1:
The patent captures the initial charge state of the SRAM latch before power reset occurs by sensing the voltage levels on bit lines during power-up. This preliminary capture stores the random state in non-volatile memory elements (anti-fuse or fuse) before the volatile SRAM state is lost, thereby preserving the random number across power cycles.
Solution Approach 2:
The patent creates a copy of the volatile random state from the SRAM latch into a non-volatile storage medium. The initial charge status of the latch is replicated into the resistance state of the non-volatile element, allowing the random number to be retained without continuously maintaining the original volatile state.
2Reliability
If non-volatile storage elements are added to capture initial charge state, then stability against power resets is improved, but device complexity increases
Solution Approach 1:
The patent combines the SRAM latch structure with non-volatile storage elements (anti-fuse or fuse) into a unified random bit cell. The sensing circuitry that reads the SRAM state is merged with the programming circuitry that writes to the non-volatile element, reducing overall system complexity despite adding non-volatile storage functionality.
Solution Approach 2:
The non-volatile storage elements serve multiple functions: they capture the initial charge state, store the random number across power cycles, and can be read back when needed. This multi-functionality reduces the need for separate volatile storage and random number generation circuits, offsetting the added complexity.
Data Source
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AI summary
A random bit cell (100) includes a latch (110), a voltage selector (120), a first non-volatile storage element (130A), and a second non-volatile storage element (130B). The latch (110) is coupled to a first local bit line (LBL1) and a second local bit line (LBL2). The first non-volatile storage element (130A) has a first terminal coupled to the first local bit line (LBL1), and a second terminal coupled to the voltage selector (120). The second non-volatile storage element (130B) has a first terminal coupled to the second local bit line (LBL2), and a second terminal coupled to the voltage selector (120). During an initial operation, the second terminals of the non-volatile storage elements (130A, 130B) are floating. During an enroll operation, the second terminals of the non-volatile storage elements (130A, 130B) receive a program voltage (VPP) from the voltage selector (120).