Random Bit Flow Normalization With Feedback for Constant Output

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Solution Overview

Problem

Conventional random bit flow generators using noise sources face issues with synchronization, leading to non-equiprobable distribution of bits and variable output rates, particularly with the Von Neumann method which results in an inconsistent and reduced bit rate.

Innovation Solution

A normalization method that conditions the state of output bits based on identical bit words and previous output states, using feedback to ensure consistent output rates by varying the assignment of states for identical bit pairs and incorporating an inversion mechanism for doublets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the Von Neumann method is used to normalize the bit flow, then the equiprobability of bits is improved, but the output bit rate becomes variable and reduced

Engineering Contradiction:

Improveequiprobability of bitsVSAvoidoutput bit rate

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies dynamics by making the normalization process adaptive rather than static. The circuit dynamically adjusts which bit pairs are accepted or rejected based on the running count of normalized bits produced, allowing the system to maintain variable acceptance criteria that optimize both equiprobability and output rate

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of acceptance criteria from fixed (Von Neumann's constant rejection of 00 and 11 pairs) to variable. The acceptance threshold is adjusted based on the desired output rate and the statistical properties of the input stream, transforming a static algorithm into a parameter-adaptive system

Inventive Principle:

Principle #35Parameter changes

2Manufacturing precision

If the Von Neumann method is used to normalize the bit flow, then the equiprobability of bits is improved, but the output rate becomes inconsistent

Engineering Contradiction:

Improveequiprobability of bitsVSAvoidoutput rate consistency

Core Design Contradiction:

Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The patent implements feedback by using the count of normalized bits produced so far to influence subsequent normalization decisions. This feedback mechanism allows the system to adjust its behavior in real-time, maintaining consistent output rates while preserving the equiprobability property of the normalized stream

Inventive Principle:

Principle #23Feedback

3Use of energy by moving object

If oscillators are used in the noise source, then the analog noise is generated, but synchronization occurs leading to non-random output

Engineering Contradiction:

Improveanalog noise generationVSAvoidrandom character of output

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent extracts and removes the synchronized portions of the bit stream through the normalization process. By identifying and rejecting bit pairs that indicate synchronization (such as consecutive identical pairs), the system separates the random useful signal from the synchronized harmful component

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent converts the harmful synchronization effect into a useful indicator. The presence of synchronized patterns in the input stream becomes a detectable signal that triggers the normalization logic to adjust its behavior, thereby using the synchronization artifact itself as a cue for correction rather than merely filtering it out

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS7689636B2Generation of a normalized random bit flow

Publication Date: 2010.03.30 STMICROELECTRONICS FRANCE

AI summary

A method and a circuit for normalizing a noise source providing an initial bit flow, including conditioning the state of an output bit to the respective states of the bits of the initial flow examined by words of identical lengths and, upon occurrence of a word of bits of identical states, conditioning the state of the current output bit to the state of at least one previous output bit.