Random Interrupts for DPA Attack Defense in Data Storage
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Solution Overview
Problem
Differential power analysis (DPA) attacks can reveal sensitive information about cryptographic functions and encryption keys by monitoring power consumption patterns in data storage devices, despite encryption efforts.
Innovation Solution
A programmable processor in a data storage device is intermittently interrupted by random timing intervals, performing non-cryptographic functions during these intervals to disrupt power consumption patterns, making it difficult for attackers to discern the underlying cryptographic function.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cryptographic functions are performed continuously without interruption, then data security is maintained, but power consumption patterns become predictable and vulnerable to DPA attacks
Solution Approach 1:
The patent applies periodic action by introducing random interrupt calls that temporarily suspend cryptographic computations at irregular intervals. These interrupts create periodic disruptions in the power consumption pattern, making it difficult for attackers to correlate power usage with specific cryptographic operations. The random timing and duration of interrupts ensure that the periodic action is unpredictable, thereby preventing DPA attacks while maintaining data security.
Solution Approach 2:
The patent uses non-cryptographic functions as intermediaries during interrupt periods. These intermediary functions perform unrelated computational tasks that mask the true cryptographic operations from occurring. By inserting these mediator functions between cryptographic computations, the power consumption pattern becomes decoupled from the cryptographic logic, preventing attackers from extracting meaningful information through power analysis.
2Object-affected harmful factors
If random interrupt calls are introduced to disrupt power patterns, then protection against DPA attacks is improved, but computational efficiency and processing speed deteriorate
Solution Approach 1:
The patent applies partial action by implementing interrupts with random durations that are typically short compared to the total cryptographic computation time. The interrupt duration is randomly selected but constrained to be a small fraction of the overall processing time. This partial interruption provides sufficient disruption to power patterns for security purposes while minimizing the impact on overall computational throughput and efficiency.
3Object-affected harmful factors
If non-cryptographic functions are performed during interrupts, then power consumption patterns are masked, but total execution time increases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the timing parameters of interrupts - both the interval between interrupts and the duration of each interrupt - using random values. This randomization of temporal parameters creates unpredictable power consumption patterns that effectively mask cryptographic operations. The parameters are chosen to balance security requirements with acceptable performance, ensuring that the total time added by interrupts remains manageable while achieving sufficient obfuscation.
Data Source
AI summary
Apparatus and method for enacting data security in a data storage device, such as by protecting against a differential power analysis (DPA) attack. In some embodiments, a programmable processor executes programming in a memory to perform a cryptographic function upon user data associated with a host command received from a host device. The cryptographic function involves multiple logical computations to arrive at an output value responsive to an input value over a time interval. During the time interval, the programmable processor is repetitively interrupted by a plurality of interrupt calls respectively selected responsive to a first series of random numbers and resumes operation by a corresponding plurality of function return calls respectively selected responsive to a second series of random numbers. Each of the interrupt calls causes the programmable processor to temporarily suspend the multiple logical computations and perform at least one non-cryptographic function.