Randomizing Dangling Nodes to Mitigate Hardware Trojans
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Solution Overview
Problem
Digital circuit designers face challenges in detecting and removing hardware trojans, particularly dangling nodes, which can be maliciously introduced through third-party designs, as existing methods lack efficiency and guarantee of complete removal, potentially impacting circuit functionality, power consumption, and heat distribution.
Innovation Solution
A system that identifies dangling nodes in a digital circuit design by generating lists of nodes and analyzing fan-in and fan-out cones, followed by randomizing the logic associated with these nodes to prevent malicious impacts, including adding, replacing, or removing logic gates within the fan-out cones of dangling nodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dangling nodes are removed from the circuit design, then hardware trojan mitigation is improved, but circuit functionality and power consumption may be adversely affected
Solution Approach 1:
The patent extracts only the harmful logic associated with dangling nodes while preserving the benign logic. By identifying dangling nodes through fan-in cone analysis and extracting only the malicious portions, the system removes hardware trojans without affecting the primary circuit functionality that depends on non-dangling nodes.
Solution Approach 2:
The patent applies local quality by differentiating between harmful and benign logic at the local level. Through analysis of fan-in cones, the system identifies which specific logic gates and connections are malicious (associated with dangling nodes) versus which are essential for circuit function, allowing selective removal of only the harmful portions.
2Measurement precision
If all nodes are analyzed to identify dangling nodes, then detection accuracy is improved, but processing time and computational resources increase
Solution Approach 1:
The patent segments the circuit analysis into manageable units by focusing on fan-in cones of specific nodes rather than analyzing the entire circuit uniformly. This segmentation allows the system to efficiently identify dangling nodes by examining only the relevant portions of the circuit graph, significantly reducing processing time while maintaining detection accuracy.
Data Source
AI summary
Described herein are various technologies pertaining to randomizing logic associated with dangling nodes in a digital circuit design. A dangling node is an input to or output from a logic gate in the digital circuit design that is identified as not impacting a desired output of the digital circuit design. Randomizing the logic associated with a dangling node can include deleting a logic gate, adding a logic gate, replacing a logic gate with another logic gate, etc. Randomizing the logic associated with the dangling node prevents hardware trojans that may have been inserted into the circuit design from being implemented in a circuit that is generated based upon the design.