Randomized DRAM Refresh Sampling for Row Hammer Protection
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Solution Overview
Problem
Dynamic random access memory (DRAM) devices experience data loss due to row hammer effects, where intensive access to a specified word-line causes adjacent memory cells to lose data, exacerbated by narrower word-line spacing in advanced manufacturing processes.
Innovation Solution
A memory device with a random bit generator, comparator, and refresh controller that randomly determines sampling periods and refreshes target memory cells based on a matching signal, identifying frequently accessed addresses to prevent data loss in adjacent cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If manufacturing processes are scaled down to increase memory density, then memory capacity is improved, but word-line spacing becomes narrower causing increased row hammer effects
Solution Approach 1:
The refresh controller performs preliminary actions by proactively identifying frequently accessed word-lines through address sampling and counter accumulation, then preemptively refreshing adjacent memory cells before data loss occurs due to row hammer effects
Solution Approach 2:
The system implements feedback by continuously monitoring access patterns through address sampling, accumulating access counts in counters, and using this information to dynamically determine which memory cells require refresh operations, creating a closed-loop protection mechanism
2Speed
If a specified word-line is intensively accessed to improve access speed, then read/write operations are accelerated, but adjacent memory cells lose data
Solution Approach 1:
The refresh controller monitors access patterns through address sampling and counter accumulation, detecting when a word-line is intensively accessed, and triggers targeted refresh operations on adjacent cells to maintain data integrity without affecting overall access speed
Solution Approach 2:
Instead of uniformly refreshing all memory cells, the system applies refresh operations locally only to adjacent memory cells of frequently accessed word-lines, determined by address matching and counter thresholds, optimizing both protection effectiveness and resource efficiency
3Reliability
If random sampling periods are used to identify frequently accessed addresses, then data loss prevention is improved, but device complexity increases
Solution Approach 1:
The refresh controller autonomously performs address sampling, random value generation, counter accumulation, and refresh decision-making without external intervention, using internal resources to identify and protect vulnerable memory cells
Solution Approach 2:
The address sampling and monitoring function is segmented into distinct components including address latches, random value generators, comparators, and counters, allowing independent operation and simplifying the overall control logic architecture
Data Source
AI summary
A memory device includes a memory cell array, a random bit generator, a comparator and a refresh controller. The memory cell array includes a plurality of memory cells coupled to a plurality of word-lines. The random bit generator generates a random binary code having a predetermined number of bits. The comparator compares the random binary code and a reference binary code to output a matching signal based on a result of the comparison. The refresh controller refreshes target memory cells from among the plurality of memory cells based on addresses accessed by a memory controller during a sampling period randomly determined based on the matching signal and a refresh command from the memory controller.