Randomized Interconnection Layer for Hardware Security
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Solution Overview
Problem
Existing hardware-based security features in electronic devices are costly to fabricate and can be easily influenced by environmental factors, lacking uniqueness and randomness, which makes them vulnerable to cloning and bypassing.
Innovation Solution
A nano-scale structurally disordered physical system, such as a randomized interconnection layer with a heterogeneous conductive layer formed by depositing a mixture of materials and undergoing thermal treatment, followed by selective etching to create a unique, randomized pattern that serves as a Physical Unclonable Function (PUF) for secure data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing hardware-based security features are used, then security functionality is provided, but fabrication cost increases and vulnerability to environmental factors increases
Solution Approach 1:
The patent changes the physical parameters of the interconnection layer by introducing structural disorder at the nano-scale, varying the arrangement, size, and shape of conductive features. This creates unique electrical characteristics that provide security functionality while using standard fabrication processes, avoiding increased fabrication costs
Solution Approach 2:
The patent applies local quality by creating regions with different structural disorder characteristics within the interconnection layer. Different areas have varying degrees of randomness and structural complexity, which provides environmental stability while maintaining security functionality through localized unique patterns
2Reliability
If existing hardware-based security features are used, then security functionality is provided, but uniqueness and randomness are lacking
Solution Approach 1:
The patent segments the interconnection layer into numerous small conductive features with random arrangements, sizes, and shapes. This segmentation creates a high degree of uniqueness between devices while maintaining overall structural order that prevents excessive complexity and ensures environmental stability
Solution Approach 2:
The patent creates a composite structure combining ordered and disordered regions within the interconnection layer. The composite nature provides both uniqueness through the disordered nano-scale features and stability through the overall structured arrangement, avoiding the need for entirely complex random structures
3Ease of manufacture
If standardized fabrication processes are used, then fabrication cost is reduced, but security feature reliability decreases
Solution Approach 1:
The patent enables the fabrication process to self-generate unique security patterns through controlled structural disorder that emerges during standard manufacturing. The random variations in conductive feature formation occur naturally during deposition and etching processes, providing security functionality without requiring additional specialized fabrication steps
Solution Approach 2:
The patent makes the interconnection layer serve multiple functions: it provides both the structural connection function and the security identification function. By embedding unique random patterns within the standard interconnection structure, the same layer performs both electrical connection and security verification, eliminating the need for separate security feature fabrication
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a reliable, hardware-based security feature that is unique to each device, resistant to environmental influences and costly to clone, thereby enhancing security in applications like smartcards and secure communications without increasing fabrication costs.
Implementation Method 1
a heterogeneous conductive layer formed by depositing a mixture of materials and undergoing thermal treatment
Implementation Method 2
followed by selective etching to create a unique, randomized pattern
Implementation Method 3
a heterogeneous conductive layer formed by depositing a mixture of materials
Data Source
Figure 1~2B
Figure 3A~3B
Figure 4~5
AI summary
An electronic device incorporating a randomized interconnection layer. In one example, the device includes a randomized interconnection layer having a randomized conductive pattern formed by etching of a heterogeneous layer; and a sensing circuit, electrically coupled to the randomized interconnection layer to detect the randomized conductive pattern. In another example, a method of fabricating the device includes forming a set of electrodes proximate to a silicon substrate; depositing a heterogeneous layer of elements onto the substrate; etching the heterogeneous layer to form a randomized conductive pattern; and electrically coupling the electrodes to a sensing circuit and the randomized conductive pattern.