Modular Reduction Hardware Using Randomized Quotient Estimation

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Solution Overview

Problem

Existing cryptographic algorithms using large-integer multiplication and modular reduction are vulnerable to power analysis and timing attacks, and current methods for efficient modular reduction, such as the Barrett method, do not adequately balance security and speed.

Innovation Solution

A computer-implemented modular reduction method that systematically underestimates the quotient with a randomized error, using a random number generator to inject error into the quotient estimation, ensuring faster computations and enhanced security against cryptoanalysis attacks while maintaining mathematical equivalence with true results.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional modular reduction methods (Barrett, Quisquater, Montgomery) are used, then computation speed is improved, but security against power analysis and timing attacks deteriorates

Engineering Contradiction:
Improvecomputation speedVSAvoidsecurity against cryptoanalysis
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The invention introduces dynamic randomization into the quotient estimation process by adding a randomized error term to the estimated quotient. This makes the computational path variable and unpredictable, preventing attackers from analyzing power consumption patterns or timing to deduce cryptographic keys, while still maintaining computational efficiency through the use of approximate quotient estimation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the parameter of quotient estimation from an exact value to an approximate value with controlled error. By systematically underestimating the quotient with a randomized error of a few bits, the method achieves faster computation while the randomized variation prevents cryptographic analysis attacks.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If exact quotient computation is performed, then accuracy is improved, but computation speed deteriorates

Engineering Contradiction:
Improvequotient accuracyVSAvoidcomputation speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The invention applies partial action by computing only an approximate quotient rather than the exact quotient. The estimated quotient with randomized error is sufficient for the modular reduction to produce a congruent remainder, eliminating the need for expensive exact division while maintaining cryptographic correctness.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The method changes the accuracy parameter of quotient computation from exact to approximate with controlled error bounds. This parameter change enables faster computation using multiplication and shifting operations instead of full division, while the randomized error ensures security against analysis attacks.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If randomized error is injected into quotient estimation, then security is improved, but computation accuracy deteriorates

Engineering Contradiction:
Improvesecurity against cryptoanalysisVSAvoidremainder accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The invention converts the potential harm of inaccuracy into a benefit by using randomized error. The inexact quotient estimation would normally produce incorrect remainders, but by carefully controlling the error bounds and using the property of modular congruence, the method produces remainders that are congruent to the true remainder, making the inaccuracy beneficial for security while maintaining mathematical correctness.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS7809133B2Randomized modular reduction method and hardware therefor
Publication Date: 2010.10.05 CRYPTOGRAPHY RESEARCH INC
  • US7809133B2 patent drawing
  • US7809133B2 patent drawing
  • US7809133B2 patent drawing

AI summary

A cryptographically secure, computer hardware-implemented modular reduction method systematically underestimates and randomizes an approximate quotient used for computation of a remainder. The randomizing error injected into the approximate quotient is limited to a few bits, e.g. less than half a word. The computed remainder is congruent with but a small random multiple of the residue, which can be found by a final set of subtractions by the modulus. In addition to a computational unit and operations sequencer, the computing hardware also includes a random or pseudo-random number generator for producing the random error. The modular reduction method thus resists hardware cryptoanalysis attacks, such as timing and power analysis attacks.