Randomized Quantum Gate Compiling for Coherent Error Conversion

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Solution Overview

Problem

Quantum computation is hindered by coherent errors arising from decoherence and imperfect control, which are difficult to manage due to their complex and varied nature, making it challenging to achieve fault-tolerant operations.

Innovation Solution

Randomized compiling techniques are employed to convert coherent errors into stochastic errors, reducing worst-case errors while maintaining a fixed average error rate, by introducing virtual random single-qubit gates into quantum logic gate sequences, which can be implemented on the fly using fast classical electronics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If coherent errors are directly managed in quantum computation, then error management complexity increases, but fault-tolerance threshold is difficult to achieve

Engineering Contradiction:
Improvefault-toleranceVSAvoiderror management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transforms the error model by changing the parameter of error type from coherent to stochastic through randomized compiling. This parameter change simplifies the error management complexity while maintaining fault-tolerance capabilities, as stochastic errors are easier to manage and characterize than coherent errors.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces randomized compiling as an intermediary process between the quantum logic gate sequence and the physical implementation. This intermediary transforms coherent errors into stochastic errors, making the error management simpler while preserving fault-tolerance properties.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If virtual random gates are introduced to convert coherent errors to stochastic errors, then worst-case error rates decrease, but computational overhead increases

Engineering Contradiction:
Improveworst-case error rateVSAvoidcomputational overhead
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary randomization to the quantum logic gate sequence before execution. By pre-introducing virtual random gates and transforming the error model beforehand, the system achieves lower worst-case error rates without adding significant computational overhead during the actual quantum computation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates multiple randomized versions of the quantum logic gate sequence. Each version is a copy with different random gate assignments, and the system processes these copies to achieve error reduction. This copying approach allows error management without significantly increasing the computational burden on the quantum processor.

Inventive Principle:
Principle #26Copying

3Reliability

If randomized compiling is applied to reduce coherent errors, then fault-tolerance becomes achievable, but error rate estimation complexity increases

Engineering Contradiction:
Improvefault-tolerance capabilityVSAvoiderror rate estimation
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent implements feedback mechanisms through randomized benchmarking to estimate error rates. By using the randomized compiling process and measuring the outcomes, the system obtains feedback on the actual error rates, enabling verification of fault-tolerance without excessive complexity in error rate estimation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10360088B2Randomized compiling for quantum computation
Publication Date: 2019.07.23 KEYSIGHT TECH CANADA INC
  • US10360088B2 patent drawing
  • US10360088B2 patent drawing
  • US10360088B2 patent drawing

AI summary

In a general aspect, randomized compiling techniques for quantum computing are described. In some aspects, an initial quantum-logic gate sequence is received. A modified quantum-logic gate sequence is generated by applying virtual random gates to the initial quantum-logic gate sequence, such that the initial quantum-logic gate sequence is logically equivalent to the modified quantum-logic gate sequence. The modified quantum-logic gate sequence can be provided to a quantum information processor for execution.