Randomness Test Circuit for Restart Random Number Generators

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Solution Overview

Problem

Existing random number generators, particularly those using drifting oscillators, face challenges in detecting pseudo-periodicity and low entropy due to fast sampling rates, which can result in pseudo-random sequences that are difficult to identify online, requiring complex and costly randomness tests.

Innovation Solution

A method and apparatus utilizing two counters to track successive bits of logic 1 and logic 0, resetting them accordingly, and producing a failure indication when predetermined counts are reached, to detect long sequences of equal samples and ensure randomness, thereby simplifying the detection of randomness failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fast sampling rate is used in drifting oscillator, then productivity is improved, but measurement precision deteriorates due to pseudo-periodicity detection difficulty

Engineering Contradiction:
Improvesampling rateVSAvoidpseudo-periodicity detection
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent changes the detection parameter from complex statistical analysis to simple run-length counting. By monitoring the length of consecutive identical bits rather than performing sophisticated pseudo-periodicity analysis, the system maintains detection precision while enabling fast sampling rates.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts the essential feature of randomness detection (run length of identical bits) from the complex pseudo-periodicity detection problem. This extraction simplifies the measurement while preserving the ability to detect non-random patterns in the sampled sequence.

Inventive Principle:
Principle #2Taking out (Extraction)

2Measurement precision

If complex randomness tests are used to detect pseudo-periodicity, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improverandomness detection accuracyVSAvoidtest circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces expensive, complex randomness test circuits with simple, inexpensive counters. The counters are basic digital components that can be easily implemented in hardware, providing the same detection function at much lower cost and complexity.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent substitutes complex statistical analysis mechanisms with simple digital counting mechanisms. Instead of using sophisticated algorithms to detect pseudo-periodicity, the system uses basic counter circuits to monitor run lengths, replacing mechanical/algorithmic complexity with simple digital logic.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If large buffers are used to detect pseudo-period, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
Improvepseudo-period detection accuracyVSAvoiddetection delay
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent uses partial action by monitoring only the run length of identical bits rather than analyzing the entire pseudo-period cycle. This partial monitoring provides sufficient detection precision without requiring large buffers or long observation periods, thus reducing detection delay.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach provides a simple and cost-effective means to detect randomness failures in restart mode random number generators, preventing pseudo-periodicity and ensuring higher randomness by adjusting the sampling rate or oscillator parameters based on counter overflow signals.

Implementation Method 1

a first counter for counting successive bits representative of a logic 1, and a second counter for counting successive bits representative of a logic 0

Methodology Applied
Scientific EffectDigital counting:

Data Source

PatentUS8805905B2On-line randomness test for restart random number generators
Publication Date: 2014.08.12 SEAGATE TECH LLC
  • US8805905B2 patent drawing
  • US8805905B2 patent drawing
  • US8805905B2 patent drawing

AI summary

An apparatus includes a first counter for counting successive bits representative of a logic 1, and a second counter for counting successive bits representative of a logic 0, wherein a first predetermined count on the first counter or a second predetermined count on the second counter indicates a randomness failure. A method for testing randomness performed by the apparatus is also included.