Range-Based Address Translation for Cache Coherence
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Solution Overview
Problem
In conventional page-based memory systems, when data from a virtual address range is paged into a physical address range previously occupied by another virtual address range, the new data is broadcast through the coherence network, leading to inefficient cache flushes and increased bus traffic, as every core must be flushed of old data values, regardless of whether the data is extant in the caches or not.
Innovation Solution
A range-based address translation mechanism that allows selective coherence flush operations outside the coherence network, reducing the burden on cache tag data structures by only flushing cache lines that are extant within the cache network, and enabling out-of-coherence network devices to signal coherence state modifications only for lines that need updating.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If new data is broadcast through the coherence network on a cache line granularity, then data coherence is maintained across all cores, but bus traffic increases and cache flush efficiency decreases
Solution Approach 1:
The patent extracts only the necessary cache lines that contain extant data from the full page and broadcasts/flushes only those specific cache lines through the coherence network, rather than broadcasting all cache lines in the page. This selective approach maintains data coherence while reducing bus traffic and energy consumption.
Solution Approach 2:
The patent applies partial action by performing cache flush operations only on the subset of cache lines that actually contain data (extant cache lines) rather than flushing all cache lines in the page. This partial approach is sufficient to maintain coherence while avoiding unnecessary bus traffic.
2Reliability
If cache maintenance instructions are issued for all elements within the target address range at page granularity, then coherence state is updated for all possible cached data, but the number of requests and overhead increases
Solution Approach 1:
The patent extracts and identifies only the extant cache lines within the target address range that actually contain cached data, and issues cache maintenance instructions only for those specific cache lines. This extraction approach ensures coherence state updates are applied where needed while reducing the total number of requests and overhead.
3Reliability
If every core is flushed of old data values regardless of whether data is extant in caches, then data coherence is ensured, but system performance and efficiency decrease
Solution Approach 1:
The patent extracts information about which cache lines actually contain extant data and uses this information to selectively flush only those cache lines from core caches, rather than flushing all cache lines from all cores. This maintains data coherence while improving system efficiency by avoiding unnecessary flush operations.
Solution Approach 2:
The system uses tracking information about extant cache lines to automatically determine which cache lines require flushing, allowing the coherence mechanism to serve itself by making intelligent decisions about which operations are necessary, rather than blindly flushing all data.
Data Source
AI summary
A mechanism is provided for efficient coherence state modification of cached data stored in a range of addresses in a coherent data processing system in which data coherency is maintained across multiple caches. A tag search structure is maintained that identifies address tags and coherence states of cached data indexed by address tags. In response to a request from a device internal to or external from the coherence network, the tag search structure is searched to identify address tags of cached data for which the coherence state is to be modified and requests are issued in the data processing system to modify a coherence state of cached lines with the identified address tags. The request from the external device may specify a range of addresses for which a coherence state change is sought. The tag search structure may be implemented as search tree, for example.