Range-Based Address Translation for Nested Virtual Machines

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Solution Overview

Problem

Nested virtual machines incur significant performance overhead due to the multiple-layer page table translation process, which increases address translation costs and reduces efficiency.

Innovation Solution

Implementing a range-based address translation system that uses range table buffers to translate virtual memory addresses into physical memory addresses, bypassing unnecessary translations and optimizing memory access through efficient data storage and retrieval mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional page tables are used for address translation in nested virtual machines, then address translation can be performed, but translation cost increases and performance decreases

Engineering Contradiction:
Improveaddress translation correctnessVSAvoidaddress translation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the address translation process into two independent stages: first translating guest virtual addresses to host virtual addresses using a guest page table, then translating host virtual addresses to physical addresses using a host page table. This segmentation allows each translation stage to operate independently, reducing the complexity and cost of nested virtual machine address translation while maintaining correctness.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If multiple-layer page table translation is performed in nested virtual machines, then address translation can be achieved, but the number of translation steps increases

Engineering Contradiction:
Improvenested virtual machine supportVSAvoidtranslation process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary host page table that sits between the guest virtual address space and the physical address space. This host page table acts as a mediator that translates guest virtual addresses to host virtual addresses, which are then translated to physical addresses. This intermediary structure enables nested virtual machine support while keeping the translation process manageable by breaking it into two distinct translation stages rather than requiring complex multi-layer translation.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If conventional address translation is used, then virtual memory addresses can be translated, but translation time increases

Engineering Contradiction:
Improveaddress translation accuracyVSAvoidaddress translation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary address translation by translating guest virtual addresses to host virtual addresses in advance using the guest page table during guest context setup. This preliminary translation action allows subsequent memory accesses to use the host page table directly, avoiding repeated translation operations and reducing address translation time while maintaining accuracy through the two-stage translation process.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10613989B2Fast address translation for virtual machines
Publication Date: 2020.04.07 ARM LTD
  • US10613989B2 patent drawing
  • US10613989B2 patent drawing
  • US10613989B2 patent drawing

AI summary

A host machine uses a range-based address translation system rather than a conventional page-based system. This enables address translation to be performed with improved efficiency, particularly when nest virtual machines are used. A data processing system utilizes range-based address translation to provide fast address translation for virtual machines that use virtual address space.