Range Sensor Asymmetric Well Regions for Crosstalk Suppression

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Solution Overview

Problem

Existing range sensors with charge distribution type photodetecting elements face challenges in accurately distributing charge due to positional deviations in the formation of semiconductor regions and well regions, leading to crosstalk and imbalanced charge accumulation, which affects distance detection accuracy.

Innovation Solution

The range sensor design includes spatially separated semiconductor regions with different conductivity types and well regions overlapping with them, along with transfer electrodes receiving synchronized charge transfer signals of different phases, to ensure appropriate charge distribution even with positional deviations, preventing crosstalk and maintaining balanced charge accumulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If well regions are provided to overlap with semiconductor regions to suppress crosstalk, then crosstalk suppression is improved, but manufacturing precision deteriorates due to mask positional deviations

Engineering Contradiction:
ImprovecrosstalkVSAvoidmask positional deviation
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The patent applies asymmetry by configuring well regions with different widths on opposite sides of the photodetecting element. Specifically, the well region on the first side has a different width than the well region on the second side, creating an asymmetric structure that compensates for mask positional deviations during manufacturing. This asymmetric design ensures that even when masks are misaligned, the charge distribution remains balanced across the semiconductor regions.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent employs parameter changes by adjusting the width parameters of well regions based on their positional relationships with semiconductor regions. The well region width is specifically designed to be larger on one side and smaller on the other side, with the width ratio optimized to compensate for expected mask deviations. This parameter optimization ensures consistent charge accumulation despite manufacturing variations.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If multiple semiconductor regions are provided for charge distribution, then distance detection accuracy is improved, but charge accumulation balance deteriorates due to positional deviations

Engineering Contradiction:
Improvedistance detection accuracyVSAvoidcharge accumulation balance
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The patent uses asymmetry to balance charge accumulation across multiple semiconductor regions. By making the well region widths asymmetric (different on opposite sides), the design compensates for mask positional deviations that would otherwise cause unequal charge distribution. This ensures that each semiconductor region accumulates charge proportionally to its intended function, maintaining stability in charge accumulation balance.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent optimizes the width parameters of well regions to maintain charge accumulation balance. The width of each well region is specifically designed based on its position relative to semiconductor regions, with the width ratio between opposite well regions optimized to compensate for manufacturing deviations. This parameter optimization ensures that charge distribution remains accurate despite variations in mask alignment.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If well region width is increased to suppress crosstalk, then crosstalk suppression is improved, but device area increases

Engineering Contradiction:
Improvecrosstalk suppressionVSAvoidsensor area
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent reduces overall device area by using asymmetric well region widths instead of uniformly increasing all well region widths. The well region on one side has a larger width for crosstalk suppression, while the well region on the opposite side has a smaller width, optimizing the balance between crosstalk suppression and area efficiency. This asymmetric approach achieves effective crosstalk suppression without unnecessarily increasing the total sensor area.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses the imbalance in charge accumulation and enhances the accuracy of distance detection by ensuring proper charge distribution across semiconductor regions, thereby improving the precision of distance measurement in range sensors and range image sensors.

Implementation Method 1

detect reflected light from the object with a photodetecting element

Methodology Applied
Scientific EffectPhotoelectric Effect: Photoelectric Effect

Implementation Method 2

distribute a charge generated in the image sensor according to incidence of a detected pulse into one potential well during an ON duration of an emitted pulse and into the other potential well during an OFF duration

Methodology Applied
Scientific EffectCharge carrier drift: Conduction (electrical)

Data Source

PatentEP2506031B1Range sensor and range image sensor
Publication Date: 2019.12.11 HAMAMATSU PHOTONICS KK
  • EP2506031B1 patent drawingFigure 1
  • EP2506031B1 patent drawingFigure 2
  • EP2506031B1 patent drawingFigure 3

AI summary

A photogate electrode PG has first and second sides opposed to each other. First and second semiconductor regions FD1, FD2 are arranged as spatially separated from each other on the side where the first side of the photogate electrode PG exists and along the first side. Third and fourth semiconductor regions FD3, FD4 are arranged as spatially separated from each other on the side where the second side of the photogate electrode PG exists and along the second side. First gate electrodes TX1 are provided between the photogate electrode PG and the first and third semiconductor regions FD1, FD3. Second gate electrodes TX2 are provided between the photogate electrode PG and the second and fourth semiconductor regions FD2, FD4. The first to fourth semiconductor regions FD1-FD4 are formed so as to overlap with respective p-type well regions W1-W4 and so as to be surrounded by the respective well regions W1-W4.