Rapid Sensing Circuit for Early Integration Value Estimation

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Solution Overview

Problem

Conventional light sensors face inefficiencies in estimating integration results due to small changes in external signals, leading to increased time and costs, as they require complete integration time to obtain digital values, even when signal differences are minimal.

Innovation Solution

A rapid sensing value estimation circuit and method that includes a first sensing unit, integration sensing circuit, and rapid estimation circuit, utilizing an operational amplifier, comparator, counters, clock generator, and arithmetic module to estimate integration results early by generating and comparing count values, allowing for the amplification of weak signals and efficient use of saved integration time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional integration sensing circuit waits for complete integration time to obtain digital values, then measurement precision is maintained, but loss of time increases significantly

Engineering Contradiction:
Improvedigital value accuracyVSAvoidintegration operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary estimation of the integration result before the complete integration time elapses. The estimation circuit calculates a predicted final count value based on the current count value and the relationship between clock signal frequency and reset signal frequency, allowing early determination of sensing results without waiting for full integration completion.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a digital model (estimation circuit) that replicates the integration process mathematically. By using the ratio relationship between clock cycles and reset signal cycles, the system generates a copied representation of the final integration result that can be obtained earlier than the actual integration completion.

Inventive Principle:
Principle #26Copying

2Reliability

If conventional light sensor requires complete integration time for all signal conditions, then reliability of measurement is maintained, but productivity decreases due to inability to process multiple channels efficiently

Engineering Contradiction:
Improvemeasurement reliabilityVSAvoidmulti-channel processing capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The estimation circuit performs preliminary determination of integration results early in the integration period. When the estimated result is obtained with sufficient confidence (when second count value exceeds first predetermined count value), the system can proceed with subsequent operations without waiting for complete integration, enabling parallel processing of multiple sensor channels.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces dynamic adaptability by allowing the system to exit early from integration when estimation confidence is sufficient. The integration process transitions from a fixed-time operation to a flexible operation that can terminate early based on signal strength and estimation accuracy, improving overall system productivity.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the estimation of integration results in advance, saving integration operation time and reducing costs, while maintaining the linearity of the original architecture, and allows for quick amplification and utilization of weak sensing signals, enabling multiple count value outputs within the complete integration time for multi-channel sensors.

Implementation Method 1

The operational amplifier receives the first sensing signal and generates an integration voltage at the integrating node

Methodology Applied
Scientific EffectIntegration:

Implementation Method 2

a second input terminal of the operational amplifier is grounded. The output terminal of the operational amplifier is an integration node, and the operational amplifier receives the first sensing signal and generates an integration voltage at the integrating node

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 3

A first input terminal of the comparator is electrically connected to the integration node, and a second input terminal of the comparator is electrically connected to a first reference voltage. In response to the integration voltage exceeding the first reference voltage, the comparator is configured to generate a trigger reset signal

Methodology Applied
Scientific EffectVoltage comparison:

Implementation Method 4

The first counter is configured to count the trigger reset signal within an integration time to generate and correspondingly output a first count value

Methodology Applied
Scientific EffectCounting:

Implementation Method 5

The clock generator is configured to generate a clock signal with a first frequency. The second counter is electrically connected to the clock generator and configured to count the clock signal within the integration time to generate a second count value

Methodology Applied
Scientific EffectClock signal generation:

Implementation Method 6

the arithmetic module is configured to, in response to the first digital comparator determining that the second count value exceeds the first predetermined count value, estimate the first count value at an end of the integration time according to a ratio of the second maximum count value to the second count value and the first count value when the second count value exceeding the first predetermined count value

Methodology Applied
Scientific EffectRatio calculation:

Data Source

PatentUS11085818B1Rapid sensing value estimation circuit and method thereof
Publication Date: 2021.08.10 ANPEC ELECTRONICS CORPORATION
  • US11085818B1 patent drawing
  • US11085818B1 patent drawing
  • US11085818B1 patent drawing

AI summary

A rapid sensing value estimation circuit and a method thereof are provided. The rapid sensing value estimation circuit includes a first sensing unit, an integration sensing circuit and a rapid estimation circuit. The rapid estimation circuit includes a clock generator, a second counter, a first digital comparator, and an arithmetic module. The clock generator generates a clock signal. The second counter counts the clock signal to generate a second count value. The first digital comparator determines whether the second count value exceeds a first predetermined count value when the first count value increases. The arithmetic module estimates the first count value at an end of an integration time according to a ratio of the second maximum count value to the second count value and the first count value when the second count value exceeding the first predetermined count value, to generate an estimated count value result.