Rate-Adaptive Data Transfer Between Modems and Host Platforms
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Solution Overview
Problem
Current LTE modem implementations using PCIe IX for data transfer between modem and host platforms are inefficient for high data rate communications in 5G networks, as the energy consumption increases due to frequent switching of PCIe links and off-chip memory usage, which was optimized for lower data rates in 4G networks.
Innovation Solution
A rate-adaptive data transfer scheme is introduced, utilizing three operation modes based on data rate thresholds: low data rates use on-chip memory with periodic bursts, medium data rates offload to off-chip memory, and high data rates keep the PCIe link active for continuous streaming, optimizing energy consumption by adjusting data transfer strategies based on current data rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If data is stored in off-chip memory during aggregation periods to save power, then energy consumption is reduced for low data rates, but energy consumption increases for high data rates due to frequent switching and off-chip memory usage
Solution Approach 1:
The patent implements dynamic adaptation of data transfer mode based on real-time data rate conditions. The system switches between three operational modes (aggregation with off-chip memory, aggregation with on-chip memory, and continuous streaming) depending on whether the data rate is below or above threshold values, optimizing energy consumption for varying network conditions
Solution Approach 2:
The system changes operational parameters (data transfer mode, memory usage, link activation state) based on the data rate parameter. When data rate exceeds a threshold, the system transitions from aggregation mode to continuous streaming mode, adjusting the state of PCIe links and memory operations to match current network throughput requirements
2Productivity
If PCIe link is kept active for continuous data transfer, then data transfer efficiency is improved for high data rates, but energy consumption increases
Solution Approach 1:
The system dynamically adjusts PCIe link activation state based on data rate conditions. For high data rates exceeding the threshold, the PCIe link is maintained in an active state enabling continuous streaming. For lower data rates, the link enters aggregation periods where it can be deactivated or placed in low-power state, optimizing the balance between transfer efficiency and energy consumption
3Use of energy by moving object
If data aggregation is used to reduce PCIe link switching, then energy consumption is reduced, but data transfer efficiency decreases for high data rates
Solution Approach 1:
The system changes the aggregation parameter (aggregation period duration) based on data rate conditions. When data rate is below the threshold, aggregation is enabled with appropriate aggregation periods to reduce PCIe link switching frequency. When data rate exceeds the threshold, aggregation is disabled and continuous streaming mode is activated, eliminating aggregation-related delays and maximizing data transfer efficiency
Data Source
AI summary
Systems, methods, and computer-readable media for transferring data between a host platform and modem circuitry are provided. At low data rates, data may be stored by on-chip memory, and data may be transferred from the on-chip memory to the host platform over an interconnect (IX) when a first aggregation period expires. At medium data rates, data may be stored in both the on-chip memory and in in-package or off-chip memory, and the data may be transferred from the on-chip memory and off-chip memory to the host platform over the IX when a second aggregation period expires. At high data rates, the on-chip memory may serve as an elastic buffer, and the data may be streamed directly through the on-chip memory to the host platform over the IX. Other embodiments are described and/or claimed.