Rate Transition Block for Data Integrity in Graphical Modeling
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Solution Overview
Problem
Data transfer between tasks in graphical modeling environments with different rate characteristics and priorities often results in data integrity issues due to task preemption, leading to the use of non-portable solutions and unnatural modeling constructs that are not well-suited for real-time operating systems.
Innovation Solution
The implementation of a rate transition block that controls data transfer characteristics between tasks with different rate characteristics and priorities, using portable markers and buffers to ensure data integrity, allowing selective enablement and disablement of data integrity for each transfer operation across various software and hardware platforms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If data is transferred between tasks with different priorities using global variables, then data transfer simplicity is improved, but data integrity is worsened due to task preemption causing partially updated data to be read
Solution Approach 1:
The patent introduces a rate transition block as an intermediary component between tasks with different rate characteristics. This block includes a write buffer for storing data from asynchronous tasks and a read buffer for providing data to synchronous tasks, thereby mediating the data transfer and preventing direct access issues that lead to data integrity problems
2Reliability
If non-portable solutions are used to ensure data integrity during task preemption, then data integrity is improved, but portability across software and hardware platforms is worsened
Solution Approach 1:
The patent uses buffer copying mechanisms where data is first written to a write buffer by the asynchronous task, then copied to a read buffer for the synchronous task. This copying approach ensures data integrity without requiring non-portable solutions, as buffer operations are implemented using standard ANSI-C programming constructs that are portable across platforms
3Reliability
If writer/reader block pairs are implemented to control data transfer, then data integrity is improved, but device complexity is worsened due to the need for multiple blocks and interrupt disabling
Solution Approach 1:
The patent merges the writer and reader functionality into a single rate transition block that handles both data buffering and rate conversion. This unified approach eliminates the need for separate writer/reader block pairs and associated interrupt disabling mechanisms, thereby reducing modeling complexity while maintaining data integrity through the buffer-based transfer mechanism
4Productivity
If task preemption is allowed for real-time scheduling, then real-time performance is improved, but data transfer reliability is worsened due to interrupted write operations resulting in partially updated data
Solution Approach 1:
The patent implements preliminary action by having the asynchronous task write complete data to the write buffer before the synchronous task reads from the read buffer. The rate transition block ensures that data is fully written and buffered before making it available for reading, thereby preventing the synchronous task from reading partially updated data even when preemption occurs
Data Source
AI summary
A method and apparatus are disclosed for providing a rate transition block in a graphical modeling environment that is programmable by a user to specify data integrity during a data transfer operation between two operations operating in an asynchronous manner or between an operation operating in an asynchronous manner having a first priority and an operation operating in a synchronous manner having a second priority. The rate transition block is a multi-rate transition block generating code that is portable. The multi-rate transition block has more than one operation operating at more than one operating rate.