Ray Tracing Acceleration Structure Processing Using TLAS and BLAS Hierarchies

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Solution Overview

Problem

Existing ray tracing techniques are inefficient for real-time image rendering due to the high number of intersection tests required between rays and primitives in complex scenes, even with existing acceleration structures.

Innovation Solution

A processing device and method that utilizes a machine-readable storage medium and processor to efficiently process ray tracing acceleration structures by traversing a top-level acceleration structure (TLAS) and bottom-level acceleration structure (BLAS) using descriptors, reducing the need for unnecessary intersection tests through a hierarchical bounding volume structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If simple ray tracing techniques are used to test every ray for every primitive, then completeness of intersection testing is ensured, but processing efficiency deteriorates significantly

Engineering Contradiction:
Improvecompleteness of intersection testingVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the scene into a hierarchical structure with TLAS (top-level acceleration structure) and BLAS (bottom-level acceleration structure). The TLAS contains instance data and organizes the scene at a high level, while BLAS contains detailed primitive data. This segmentation allows the system to first filter rays against instance bounding volumes in TLAS, then only test against actual primitives in BLAS for intersected instances, dramatically reducing the total number of intersection tests while maintaining completeness.

Inventive Principle:
Principle #1Segmentation

2Productivity

If acceleration structures are used to reduce intersection tests, then processing efficiency is improved, but the rate of intersection tests may still not be suitable for real-time rendering

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidintersection test rate
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The patent performs preliminary organization of scene data into TLAS and BLAS structures before ray tracing begins. Instance data including bounding volumes are pre-computed and stored in TLAS, while primitive data are organized in BLAS. This preliminary action enables the rendering system to quickly navigate the hierarchical structure during ray tracing, performing only necessary intersection tests at appropriate levels, thereby achieving real-time rendering speeds.

Inventive Principle:
Principle #10Preliminary action

3Speed

If hierarchical acceleration structure with TLAS and BLAS is used, then intersection test rate is improved, but device complexity increases

Engineering Contradiction:
Improveintersection test rateVSAvoidacceleration structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent implements a nested hierarchical structure where TLAS contains references to multiple BLAS structures, and each BLAS contains references to primitives. The instance data in TLAS acts as an intermediate layer that nests multiple BLAS structures under a unified scene graph. This nesting approach organizes complexity in a manageable hierarchy, allowing efficient navigation from scene level (TLAS) down to primitive level (BLAS) without requiring a single monolithic complex structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS12094051B2Processing device and processing method for ray tracing acceleration structure
Publication Date: 2024.09.17 SHANGHAI BIREN TECH CO LTD
  • US12094051B2 patent drawing
  • US12094051B2 patent drawing
  • US12094051B2 patent drawing

AI summary

The present disclosure provides to a processing device and a processing method for a ray tracing acceleration structure. The processing device includes a machine-readable storage medium and a processor. The processor executes a descriptor to simulate the interaction between the ray with the scene, and the descriptor includes a first pointer and a second pointer. The processor obtains the TLAS by using the first pointer. The processor traverses the TLAS to find a leaf node in the TLAS that intersects the ray, and the intersected leaf node includes an instance identifier. The processor obtains the intersected instance record from the instance buffer pointed to by the second pointer by using the instance identifier, and the intersected instance record includes a third pointer. The processor obtains the BLAS by using the third pointer. The processor traverses the BLAS to find a primitive node in the BLAS that intersects the ray.