Ray Tracing Memory Allocation for Shader Recursion

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Solution Overview

Problem

Existing ray tracing systems face challenges in efficiently managing memory allocation for recursive processing, leading to inefficient use of memory resources and increased latency due to sparse memory allocation.

Innovation Solution

The proposed solution involves allocating memory on a per-task basis in a ray tracing system, where intermediate data for multiple instances of a shader program are stored in a contiguous block of memory, reducing the need for frequent memory allocations and improving memory efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory is allocated on a per-instance basis for shader recursion, then each instance can have its own intermediate data storage, but memory resources are wasted due to sparse allocation and increased latency occurs

Engineering Contradiction:
Improveintermediate data storageVSAvoidmemory resource efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent merges intermediate data storage for multiple shader instances into a single shared memory buffer instead of allocating separate memory for each instance. This consolidation eliminates wasted memory space and reduces the overhead of managing multiple allocations, directly resolving the contradiction between reliable data storage and memory efficiency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared memory buffer serves multiple shader instances simultaneously, making it a universal storage resource. This multi-functional approach allows the same memory region to be reused across different instances and recursion levels, improving memory utilization without compromising the ability to store intermediate data for any given instance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of information

If memory is allocated on a per-instance basis, then individual intermediate data can be stored, but the total memory required increases and memory bandwidth utilization decreases

Engineering Contradiction:
Improveintermediate data preservationVSAvoidtotal memory required
Core Design Contradiction:
Loss of informationVSQuantity of substance

Solution Approach 1:

By combining intermediate data from multiple instances into a single shared buffer, the patent reduces the total memory quantity required. The merging process allows efficient packing of data and eliminates redundant allocations, preserving all necessary intermediate information while using less total memory.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system recovers and reuses memory space by allowing different shader instances to share the same buffer. When one instance finishes using its intermediate data, that space becomes available for reuse by other instances, effectively recovering memory resources that would otherwise remain allocated and wasted.

Inventive Principle:
Principle #34Discarding and recovering

3Adaptability or versatility

If frequent memory allocations are performed for recursive shader processing, then each recursive call can have dedicated storage, but latency increases due to allocation overhead

Engineering Contradiction:
Improverecursive processing capabilityVSAvoidmemory allocation latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent performs preliminary action by pre-allocating a single shared memory buffer before shader recursion begins, rather than performing allocations during each recursive call. This eliminates the time-consuming allocation overhead during recursion while still providing dedicated storage capacity for intermediate data through the shared buffer mechanism.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically manages the shared memory buffer to serve different shader instances as needed during recursion. The buffer allocation and data placement are dynamically adjusted based on which instance is currently executing, providing adaptability for recursive processing without the static overhead of pre-allocating separate memory for each potential instance.

Inventive Principle:
Principle #15Dynamics

4Reliability

If memory is sparsely allocated for shader instances, then individual instance requirements are met, but memory bandwidth utilization is reduced

Engineering Contradiction:
Improveinstance data integrityVSAvoidmemory bandwidth utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Merging intermediate data into a shared buffer creates dense, contiguous memory usage patterns that maximize memory bandwidth utilization. This combining approach maintains data integrity for each instance while eliminating the sparse allocation pattern that wastes bandwidth, as all instances access memory from a single consolidated region.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies local quality by organizing the shared buffer to provide instance-specific access patterns while maintaining overall density. Each instance accesses its relevant data region within the shared buffer with optimized locality, preserving data integrity while the consolidated structure enables efficient bulk memory operations and high bandwidth utilization.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250138867A1Memory allocation in a ray tracing system
Publication Date: 2025.05.01 IMAGINATION TECH LTD
  • US20250138867A1 patent drawing
  • US20250138867A1 patent drawing
  • US20250138867A1 patent drawing

AI summary

A method of processing rays in a ray tracing system allocates a block of memory for a task on a per-task basis. Processing rays in the task causes at least one child ray to be emitted such that intermediate data for the task is written to the block of memory, the intermediate data being written to and read from the block of memory in one or more finite-sized data bursts. Processing of the task is suspended, and when the task is ready to resume, the intermediate data or updated intermediate data for the task is read from the block of memory, and the processing of the task is resumed.