Ray Tracing Shader Recursion Using Off-Chip Heap Allocation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing ray tracing systems face challenges in managing memory allocation for recursive processing, particularly in devices with limited on-chip storage capabilities, leading to performance degradation due to the need for increased on-chip resources or inefficient use of off-chip memory.
Innovation Solution
A method and system for ray tracing that involves suspending the execution of parent shaders and storing intermediate data, including state and payload data, in a unified heap of off-chip memory, allowing dynamic allocation of registers for efficient storage and resuming execution when child shaders complete.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If intermediate data for parent shaders is stored in on-chip memory, then access speed is improved, but device complexity and resource requirements increase
Solution Approach 1:
The patent extracts intermediate data storage from on-chip memory to off-chip memory, specifically using a display memory buffer that already exists in the system. This removes the burden of additional on-chip storage resources while maintaining the ray tracing recursion functionality.
Solution Approach 2:
The patent repurposes display memory, which already exists in the system for display purposes, to also serve as storage for ray tracing intermediate data. This multi-functional use of memory avoids adding dedicated storage hardware and reduces overall device complexity.
2Quantity of substance
If more on-chip storage resources are allocated for recursive processing, then memory availability for recursion is improved, but device complexity and cost increase
Solution Approach 1:
The patent merges the display memory buffer with the ray tracing intermediate data storage, combining two memory usage purposes into a single shared resource. This eliminates the need for separate dedicated memory allocations for both display and ray tracing operations.
Solution Approach 2:
The system uses its own existing display memory infrastructure to serve the additional function of storing ray tracing intermediate data, rather than requiring external or additional memory resources. The display memory effectively serves itself dual purposes.
3Device complexity
If intermediate data is stored in off-chip memory, then device complexity is reduced, but access latency increases
Solution Approach 1:
The patent introduces a memory buffer interface that acts as an intermediary between the ray tracing processing units and the display memory. This buffer manages data transfer efficiently, minimizing latency by optimizing the interaction between the processing units and the memory storage.
4Productivity
If dedicated on-chip memory is allocated for ray tracing recursion, then recursion performance is improved, but power consumption increases
Solution Approach 1:
The system uses its existing display memory infrastructure to serve ray tracing storage needs, rather than activating additional power-consuming memory subsystems. This leverages already-powered memory resources for dual purposes.
Data Source
AI summary
Ray tracing systems and methods are described for processing rays. A parent shader is executed for a ray. The parent shader includes a shader recursion instruction which invokes a child shader. The execution of the parent shader for the ray is suspended. Intermediate data for the parent shader is stored in a heap of memory, wherein the intermediate data comprises state data and payload data. Storing intermediate data comprises allocating a first set of registers in the heap of memory for storing payload data, and allocating a second set of registers in the heap of memory for storing state data. When the parent shader is ready to resume, intermediate data for the parent shader is read from the heap of memory, and the execution of the parent shader for the ray is resumed.