Ray Tracing Instance Transform Cache for Faster Intersection Testing

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Solution Overview

Problem

Ray tracing systems face challenges in achieving real-time rendering on devices with tight constraints on silicon area, cost, and power consumption, such as mobile devices, due to high processing requirements and inefficient intersection testing with current acceleration structures.

Innovation Solution

A hierarchical acceleration structure with instance transforms is used, where each lower level node has a defined relationship to an upper level node, and an instance transform cache stores these transforms for efficient retrieval during intersection testing, reducing memory access overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If hierarchical acceleration structures with instance transforms are used, then intersection testing efficiency is improved, but memory access overhead increases

Engineering Contradiction:
Improveintersection testing efficiencyVSAvoidmemory access overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent pre-calculates and stores instance transforms in a cache structure before intersection testing begins. This preliminary action allows the transforms to be readily available during ray tracing operations, eliminating the need for real-time calculation and reducing memory access overhead during actual intersection testing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a cached copy of instance transforms that can be reused across multiple intersection testing operations. Instead of accessing original transform data repeatedly from main memory, the system uses these cached copies stored in a specialized memory structure, reducing memory access time and overhead.

Inventive Principle:
Principle #26Copying

2Manufacturing precision

If ray tracing is implemented on mobile devices, then photorealistic rendering is achieved, but processing power requirements exceed device capabilities

Engineering Contradiction:
Improverendering qualityVSAvoidprocessing power consumption
Core Design Contradiction:
Manufacturing precisionVSPower

Solution Approach 1:

The patent segments the ray tracing processing into distinct stages: coherency gathering, intersection testing, and shading. Each stage is optimized independently with specialized hardware units, allowing mobile devices to perform photorealistic rendering by breaking down the computationally intensive task into manageable segments that can be executed efficiently on constrained hardware.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the processing parameters by organizing rays into coherent groups based on spatial and temporal relationships. This reorganization allows the system to process multiple rays together using shared instance transforms from the cache, reducing the total number of operations required and lowering power consumption while maintaining rendering quality.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If instance transforms are cached for coherency gathering, then processing efficiency is improved, but silicon area increases

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidsilicon area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent implements a nested memory structure where the instance transform cache is organized hierarchically with smaller, frequently accessed transforms stored in faster, closer memory locations. This nested arrangement allows the system to achieve high processing efficiency by accessing critical transforms quickly while using less total silicon area compared to a flat, uniform cache structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS20260011069A1Coherency Gathering for Ray Tracing
Publication Date: 2026.01.08 IMAGINATION TECH LTD
  • US20260011069A1 patent drawing
  • US20260011069A1 patent drawing
  • US20260011069A1 patent drawing

AI summary

A system and method for coherency gathering for rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes including upper level nodes and lower level nodes. For each instance where one of the lower level nodes is a child of one of the upper level nodes, an instance transform is defined, specifying the relationship between a first coordinate system of the upper level node and the second coordinate system for that instance of the lower level node. The system provides an instance transform cache for storing a plurality of these instance transforms while conducting intersection testing.