RC-IGBT Anode Contact Layer Design for Recovery Loss Reduction
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Solution Overview
Problem
The existing RC-IGBT devices face challenges with high recovery loss due to excessive carriers in the anode region, leading to increased recovery time and reduced reverse bias safe operating area, primarily because of high p-type impurity concentration in the anode region.
Innovation Solution
The semiconductor device design includes a configuration where the p+-type contact layer in the transistor region extends to the outer peripheral region, forming a boundary with the impurity layer, and the contact hole extends to the upper portion of the impurity layer, reducing hole current flow and minimizing the reverse bias safe operating area drop by creating a configuration less likely to latch up and efficiently extracting holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the p-type anode region is designed to allow hole inflow for conductivity modulation, then forward voltage drop is reduced, but reverse bias safe operating area decreases due to latch-up risk
Solution Approach 1:
The patent implements local quality by dividing the anode into regions with different impurity concentrations. The first region maintains high p-type impurity concentration for conductivity modulation during forward conduction, while the second region has lower concentration to reduce excess carrier storage and minimize latch-up risk during reverse bias operation, thereby preserving the reverse bias safe operating area.
2Stability of the object's composition
If the outer peripheral region has high p-type impurity concentration for device stability, then structural integrity is maintained, but hole current extraction becomes inefficient causing recovery loss
Solution Approach 1:
The patent applies local quality by creating a specific impurity concentration profile in the outer peripheral region. The anode extends into the outer peripheral region with optimized p-type impurity concentration that balances structural stability with efficient hole current extraction. This localized optimization allows the outer peripheral region to contribute to both device stability and reduced recovery loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces recovery loss and minimizes the drop in the reverse bias safe operating area by reducing hole current flow and potential increase, thereby enhancing the operational stability and efficiency of the RC-IGBT.
Implementation Method 1
a p-n junction, formed by an anode part (p-type anode) and p+-type contact of a diode part and an n−-type drift layer, becomes a forward bias during the operation of the FWD, and conductivity modulation occurs by holes flowing into the n−-type drift layer
Implementation Method 2
the contact hole is provided to extend to an upper portion of the impurity layer in the outer peripheral region, holes can be efficiently extracted even in the outer peripheral region near the transistor region
Data Source
AI summary
A semiconductor substrate has a transistor region, a diode region, and an outer peripheral region. The transistor region is divided into a plurality of transistor unit cell regions by a plurality of gate electrodes each having a stripe shape, and the diode region is divided into a plurality of diode unit cell regions by the plurality of gate electrodes. Each of the plurality of transistor unit cell regions has a third semiconductor layer of a first conductivity type provided on a first main surface side of the semiconductor substrate, a fourth semiconductor layer of a second conductivity type selectively provided on an upper layer part of the third semiconductor layer, and a fifth semiconductor layer. The fifth semiconductor layer is provided to be in contact with an impurity layer of the first conductivity type provided in the outer peripheral region, or to enter the impurity layer.