RC-IGBT Boundary Diode Layout for Surge Current and Low Vf
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor devices with RC-IGBTs face challenges in optimizing the peak surge current and forward voltage characteristics, leading to inefficiencies in switching performance and increased conduction losses.
Innovation Solution
The semiconductor device incorporates a boundary diode formed within the boundary region between IGBT regions, utilizing a narrower boundary cathode region and a wider boundary well region to control current channels and reduce electrical influence, along with an outer diode in the peripheral region to improve peak surge current tolerance and reduce forward voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional RC-IGBT structure is used, then the device can achieve basic switching function, but the peak surge current capability is insufficient and forward voltage is high
Solution Approach 1:
The cathode region is segmented into multiple zones with different impurity concentrations: a first cathode region with higher impurity concentration and a second cathode region with lower impurity concentration. This segmentation allows the device to handle peak surge currents effectively while maintaining low forward voltage by directing current through optimal conduction paths in each region.
Solution Approach 2:
Different regions of the cathode are assigned different impurity concentrations to optimize local electrical characteristics. The first cathode region has higher impurity concentration for low forward voltage, while the second cathode region has lower impurity concentration for surge current handling, creating local quality variations that resolve the contradiction.
2Productivity
If the boundary region between IGBT regions is made narrower to increase device density, then manufacturing efficiency improves, but electrical isolation between regions deteriorates leading to snapback phenomena
Solution Approach 1:
An intermediate cathode region is introduced between adjacent IGBT regions at the boundary. This intermediate region acts as an electrical mediator that provides sufficient isolation to prevent snapback phenomena while allowing the boundary region to remain narrow for high device density. The intermediate region with controlled impurity concentration serves as a buffer zone that maintains electrical independence between neighboring IGBT structures.
3Ease of manufacture
If uniform impurity concentration is used throughout the cathode region, then manufacturing process is simplified, but electrical characteristics cannot be optimized for both surge current and forward voltage
Solution Approach 1:
The cathode region employs non-uniform impurity distribution with distinct zones: a first cathode region with higher impurity concentration optimized for low forward voltage and a second cathode region with lower impurity concentration optimized for surge current capability. This local quality variation allows simultaneous optimization of conflicting electrical characteristics.
Solution Approach 2:
The impurity concentration parameter is varied spatially across the cathode region rather than maintained uniformly. By changing the impurity concentration parameter from one region to another, the device achieves optimized electrical characteristics for both surge current handling and forward voltage reduction, resolving the contradiction between manufacturing simplicity and performance optimization.
Data Source
AI summary
The semiconductor device includes a chip which has a first surface on one side and a second surface on the other side, a plurality of IGBT regions which are provided at an interval in the chip, a boundary region which is provided in a region between the plurality of IGBT regions in the chip, a first conductivity type cathode region which is formed in a surface layer portion of the second surface in the boundary region, and a second conductivity type well region which is formed in a surface layer portion of the first surface in the boundary region.