RC-IGBT Collector Region Segmentation for Diode Performance
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Solution Overview
Problem
Existing reverse-conducting insulated gate bipolar transistors (RC-IGBTs) face limitations in achieving good diode performance while maintaining IGBT performance, due to geometrical constraints that reduce the n-type doped area and lead to snap-back effects when trying to improve diode properties.
Innovation Solution
The RC-IGBT design incorporates alternately arranged n-type and p-type regions on the collector side, with specific geometrical rules ensuring that small first regions are surrounded by larger second regions, allowing for increased IGBT area and reduced snap-back effects, while separate pilot regions optimize diode and IGBT performance without sacrificing area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the n-type doped area is increased to improve diode performance, then diode performance is improved, but snap-back effects occur and IGBT performance deteriorates
Solution Approach 1:
The patent applies local quality by creating different region types (first regions, second regions, third regions) with different doping characteristics within the semiconductor structure. Specifically, the third regions are heavily doped n-type regions that are localized in the collector region, providing high diode performance locally without requiring the entire n-type area to be large, thus avoiding snap-back effects while maintaining IGBT performance.
Solution Approach 2:
The patent segments the collector region into multiple functional zones: first regions (lightly doped n-type), second regions (p-type), and third regions (heavily doped n-type). This segmentation allows different areas to serve different functions - the third regions provide diode conduction paths with low resistance, while the overall structure maintains the IGBT's operational characteristics and prevents snap-back effects.
2Object-generated harmful factors
If the n-type doped area is reduced to avoid snap-back effects, then snap-back effects are reduced, but diode performance deteriorates
Solution Approach 1:
The patent implements local quality by concentrating heavy n-type doping in specific third regions within the collector, rather than uniformly increasing n-type doping across the entire device. This localized heavy doping creates efficient diode conduction paths where needed, achieving good diode performance with minimal total n-type area, thus avoiding snap-back effects.
Solution Approach 2:
The patent uses a composite doping structure combining three types of regions with different doping levels and types (lightly doped n-type first regions, p-type second regions, and heavily doped n-type third regions). This composite structure optimizes both diode and IGBT performance by leveraging the complementary characteristics of each region type.
3Reliability
If the IGBT area is increased to improve IGBT performance, then IGBT performance is improved, but diode area is reduced
Solution Approach 1:
The patent applies local quality by creating heavily doped third regions specifically in the collector area where they serve the diode function. These localized regions provide efficient diode conduction paths without requiring a large overall diode area, allowing the majority of the device area to be optimized for IGBT performance while still achieving adequate diode characteristics.
Solution Approach 2:
The patent achieves multi-functionality by designing a unified semiconductor structure that performs both IGBT and diode functions. The alternating first and second regions form the basis for IGBT operation, while the added third regions provide enhanced diode conduction paths. This allows a single device structure to optimize both functions without requiring separate dedicated areas for each mode.
Data Source
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AI summary
A reverse-conducting semiconductor device (200) is provided, which comprises a freewheeling diode and an insulated gate bipolar transistor on a common wafer (100), part of which wafer (100) forms a base layer (101) with a base layer thickness (102). The insulated gate bipolar transistor comprises a collector side (103) and an emitter side (104), whereas the collector side (103) is arranged opposite of the emitter side (104) of the wafer (100). A first layer (1) of a first conductivity type and a second layer (2) of a second conductivity type are alternately arranged on the collector side (103). The first layer (1) comprises at least one first region (10) with a first region width (11) and at least one first pilot region (12) with a first pilot region width (13). The second layer (2) comprises at least one second region (20) with a second region width (21) and at least one second pilot region (22) with a second pilot region width (23). The RC-IGBT is designed in such a way that the following geometrical rules are fulfilled: Each second region width (21) is the equal to or larger than the base layer thickness (102), whereas each first region width (11) is smaller than the base layer thickness (102). Each second pilot region width (23) is larger than each first pilot region width (13). Each first pilot region width is the equal to or larger than two times the base layer thickness (102) and the sum of the areas of the second pilot regions (22) is larger than the sum of the areas of the first pilot regions (12).