RC-IGBT Doping Control for Snap-back Elimination
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Solution Overview
Problem
Existing reverse-conducting insulated gate bipolar transistors (RC-IGBTs) suffer from on-state snap-back effects and unsatisfactory control over electrical properties due to overcompensation and depth limitations of doping layers, leading to undesirable conduction voltage and current characteristics.
Innovation Solution
A method for manufacturing RC-IGBTs that involves creating layers with specific conductivity types and doping levels, where one layer has stronger p-doping than n-doping, allowing for better control and minimizing snap-back effects by precise ion implantation and annealing steps, eliminating the need for overcompensation and enabling thin layer formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If overcompensation doping is used to form p and n type layers, then the doping depth and concentration can be controlled, but snap-back effects occur and electrical properties control becomes unsatisfactory
Solution Approach 1:
The patent changes the doping parameters by using alternating ion implantation steps with precisely controlled doses and energies. Instead of overcompensation doping, the invention uses complementary doping where p-type and n-type ions are implanted in alternating layers with optimized parameters to achieve the desired doping profiles without causing snap-back effects.
Solution Approach 2:
The patent performs preliminary ion implantation steps to create alternating p-type and n-type doped regions before final device formation. The alternating ion implantation process prepares the doping structure in advance, allowing precise control over the doping profiles and preventing snap-back effects during subsequent processing.
2Ease of manufacture
If alternating p type and n type layers are formed by ion implantation, then the layer structure is created, but the dose control is limited and depth control is restricted
Solution Approach 1:
The patent segments the doping process into multiple alternating ion implantation steps, where p-type ions and n-type ions are implanted in separate, sequential steps. This segmentation allows independent optimization of each doping step's parameters (dose, energy, depth) without interfering with the other type of doping, achieving precise control over the alternating layer structure.
Solution Approach 2:
The patent uses partial ion implantation where each ion implantation step deposits a controlled portion of the total required doping concentration. By using alternating partial implantations of p-type and n-type ions, the invention achieves precise dose control and builds up the alternating layer structure gradually with excellent depth and concentration control.
3Reliability
If p type ions are implanted with higher dose to compensate n type ions, then the compensation is achieved, but the control over electrical properties becomes unsatisfactory and snap-back effects occur
Solution Approach 1:
The patent inverts the conventional compensation approach by using complementary doping instead of overcompensation. Rather than implanting one type of ion with higher dose to compensate the other type, the invention implants p-type and n-type ions with balanced, complementary doses that precisely control the electrical properties without causing snap-back effects or losing control over device characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes or eliminates snap-back effects, providing improved control over diode and IGBT properties, resulting in soft diode recovery and IGBT turn-off, reducing snappiness during reverse recovery and turn-off.
Implementation Method 1
ions are implanted into the wafer on the second side into those parts of the wafer, on which the at least one opening is arranged
Implementation Method 2
afterwards a heat treatment is performed, by which the n and p type layers are created
Data Source
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Figure 5~6
AI summary
For a method for manufacturing a reverse-conducting semiconductor device (RC- IGBT) (10) with a seventh layer (7, 7') formed as a gate electrode and a first electrical contact (8) on a emitter side (101) and a second electrical contact (9) on a collector side (102), which is opposite the emitter side (101), a wafer (11) of a first conductivity type with a first side (111) and a second side (112) opposite the first side (111) is provided.