RC-IGBT Dummy Trench Structure for Snapback Suppression

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Solution Overview

Problem

Conventional Reverse Conducting IGBTs (RC-IGBTs) experience a snapback phenomenon due to suppressed conductivity modulation, leading to reduced switching performance and increased power losses.

Innovation Solution

The semiconductor device incorporates a dummy region with a specific trench structure and electrode configuration, which alleviates electric field concentration and promotes conductivity modulation, thereby suppressing the snapback phenomenon.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electrons are transferred to the cathode region of the diode when IGBT is turned on, then the injection of holes from the collector layer into the drift region is suppressed, but conductivity modulation of the IGBT is less likely to occur, causing snapback phenomenon

Engineering Contradiction:
Improvesnapback phenomenon suppressionVSAvoidswitching performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

A dummy region is introduced as an intermediary structure between the IGBT and diode regions. This dummy region includes a semiconductor layer with trenches filled with conductive material that acts as a mediator to manage carrier distribution, alleviate electric field concentration, and promote conductivity modulation in the drift region, thereby suppressing snapback while maintaining switching performance

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dummy region implements local quality modification by creating a specific structure with trenches filled with conductive material at the interface between IGBT and diode regions. This localized structural modification changes the electrical properties in that specific area to promote hole injection and conductivity modulation without affecting the overall device function

Inventive Principle:
Principle #3Local quality

2Reliability

If a dummy region with trench structure and electrode configuration is added, then electric field concentration is alleviated and conductivity modulation is promoted, but device structure becomes more complex

Engineering Contradiction:
Improvesnapback phenomenon suppressionVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dummy region structure is merged with the existing IGBT and diode regions, sharing common semiconductor layers and processing steps. The trenches in the dummy region are formed and filled simultaneously with other device structures, integrating the complexity into the existing manufacturing flow rather than adding separate processing stages

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution effectively reduces the snapback phenomenon, improving switching performance and reducing power losses in RC-IGBTs.

Implementation Method 1

alleviates electric field concentration and promotes conductivity modulation

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentUS20250031397A1Semiconductor device
Publication Date: 2025.01.23 SANKEN ELECTRIC CO LTD
  • US20250031397A1 patent drawing
  • US20250031397A1 patent drawing
  • US20250031397A1 patent drawing

AI summary

A semiconductor device according to one or more embodiments is disclosed. A first semiconductor region includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first trench and a fourth semiconductor region. A second semiconductor region includes a fifth semiconductor region, a sixth semiconductor region, a second trench, and a second inner trench electrode. A dummy region includes a seventh semiconductor region that is arranged on the first semiconductor region between the first semiconductor region and the second semiconductor region, a third trench penetrating the seventh semiconductor region in a depth direction; and a third inner trench electrode electrically connected to the first inner trench electrode through a third insulating film in the third trench.