RC-IGBT Isolation Region Design for Snapback Inhibition
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Solution Overview
Problem
The snapback phenomenon in semiconductor devices with Reverse Conducting IGBTs leads to increased losses due to sudden changes in current and voltage, which existing methods attempt to mitigate by adjusting semiconductor layer parameters, but these adjustments affect other characteristics and manufacturing conditions.
Innovation Solution
The design includes a semiconductor substrate with specific regions such as isolation, IGBT, and diode regions, featuring a p-type deep region connected to the body and anode regions, an n-type drift region, and a gate electrode opposing the body region via an insulating film, along with a p-type collector region and n-type cathode region, where the emitter and body regions are alternately formed, and a high concentration collector region in the isolation region to inhibit snapback.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parameters such as thickness, width, and resistivity of semiconductor layers are adjusted to prevent snapback phenomenon, then snapback is inhibited, but other characteristics and manufacturing conditions are greatly affected
Solution Approach 1:
The invention divides the semiconductor device into distinct functional regions: an IGBT region with emitter and body regions, a diode region with anode and cathode regions, and an isolation region. This segmentation allows each region to be optimized independently for its specific function while preventing snapback through the isolation region's structure, thereby avoiding the need to adjust parameters across the entire device which would complicate manufacturing.
Solution Approach 2:
The isolation region is specifically designed with particular structural characteristics (such as doping concentration and geometry) to prevent snapback phenomenon locally at the boundary between IGBT and diode regions. This localized approach allows snapback prevention without requiring changes to the overall device parameters, thus maintaining manufacturing simplicity while achieving reliability improvement.
2Loss of energy
If parameters are adjusted to prevent snapback phenomenon, then loss is reduced, but diode and IGBT characteristics are affected
Solution Approach 1:
By segmenting the device into IGBT region, diode region, and isolation region, the invention enables the isolation region to specifically address snapback prevention and associated energy losses without compromising the operational characteristics of the IGBT and diode regions. Each region maintains its optimized parameters for its intended function.
Solution Approach 2:
The isolation region acts as an intermediary structure between the IGBT region and diode region. It mediates the electrical behavior at their boundary, preventing snapback phenomenon and reducing associated energy losses without directly interfering with the normal operation and characteristics of the IGBT and diode regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively inhibits the snapback phenomenon, minimizing losses and ensuring short-circuit capacity without significantly affecting diode and IGBT characteristics, allowing for easy design modifications.
Implementation Method 1
When a voltage of equal to or greater than a threshold value is being applied to a gate electrode 400 of an RC-IGBT
Implementation Method 2
the voltage applied to a pn junction 442 between the drift region 430 and the collector region 440 is lower than the collector—emitter voltage Vce
Data Source
AI summary
When a semiconductor substrate of a semiconductor device is viewed from above, an isolation region, an IGBT region, and a diode region are all formed adjacent to each other. A deep region that is connected to a body region and an anode region is formed in the isolation region. A drift region is formed extending across the isolation region, the IGBT region, and the diode region, inside the semiconductor substrate. A collector region that extends across the isolation region, the IGBT region and the diode region, and a cathode region positioned in the diode region, are formed in a region exposed on a lower surface of the semiconductor substrate. A boundary between the collector region and the cathode region is in the diode region, in a cross-section that cuts across a boundary between the isolation region and the diode region, and divides the isolation region and the diode region. The collector region formed in the isolation region has a higher dopant impurity concentration than the collector region in the IGBT region.