RC-IGBT Semiconductor Structure for Lower Switching Loss
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices with embedded diodes, such as RC-IGBTs, face challenges in reducing switching loss due to high carrier accumulation in the n-type base region, leading to slower operation speed and increased switching loss when switching between on and off states.
Innovation Solution
The semiconductor device incorporates a longer n+-type semiconductor region and a shorter p+-type contact region, along with specific impurity concentration distributions, to enhance electron discharge and suppress parasitic thyristor operation, thereby reducing switching loss while maintaining latchup withstand capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a conventional RC-IGBT structure is used, then the device can perform power conversion functions, but high carrier accumulation in the n-type base region causes increased switching loss and slower operation speed
Solution Approach 1:
The patent applies local quality by creating asymmetric doping concentrations in different regions of the semiconductor device. Specifically, the n-type semiconductor region has a first doping concentration in the diode region and a second doping concentration in the IGBT region, where these concentrations differ to optimize local carrier discharge. Additionally, the p-type contact region has a third doping concentration that is higher than the fourth doping concentration in another p-type region, creating localized high-carrier-density zones that enhance switching performance without compromising overall device function.
Solution Approach 2:
The patent implements parameter changes by systematically varying doping concentrations across different regions. The key parameter modification involves setting the third doping concentration of the p-type contact region higher than the fourth doping concentration of other p-type regions, and establishing different doping concentrations for the n-type region in diode versus IGBT areas. These parameter adjustments optimize carrier accumulation and discharge characteristics, directly reducing switching loss while improving operation speed.
2Reliability
If carrier density is increased to improve conductivity, then electrical performance improves, but latchup withstand capacity may be compromised
Solution Approach 1:
The patent uses local quality by concentrating high doping concentrations in specific regions rather than uniformly throughout the device. The p-type contact region with the third doping concentration (higher than the fourth) creates localized high-carrier-density zones that suppress parasitic thyristor operation at critical interfaces. This localized approach maintains latchup withstand capacity by preventing harmful parasitic conduction paths without requiring uniformly high carrier density throughout the entire device structure.
Data Source
AI summary
According to one embodiment, a semiconductor device includes first and second electrodes, and first and second regions. The first region includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a plurality of third semiconductor regions of the first conductivity type, a gate electrode, a conductive part, a fourth semiconductor region of the second conductivity type, a fifth semiconductor region of the first conductivity type, and a sixth semiconductor region of the second conductivity type. The gate electrode faces one of the plurality of third semiconductor regions via a gate insulating layer. The conductive part faces another one of the plurality of third semiconductor regions via an insulating layer, and is electrically connected with the second electrode. The fourth and six semiconductor regions are located on the one and the other one of the plurality of third semiconductor regions, respectively.