RC Oscillator Comparator Delay Compensation for Frequency Accuracy

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Resistance-capacitance (RC) oscillators face challenges in achieving high frequency accuracy due to comparator delay variations with temperature and supply voltage, which are particularly problematic in low-power applications where power consumption needs to be minimized.

Innovation Solution

An RC oscillator design that includes a timing circuit with matched current sources, capacitors, and a resistor, along with an analog circuit featuring a second continuous time comparator and an EX-OR gate, which passes a clock signal to obtain a delayed clock signal, extracts comparator delay, and charges capacitors with a boosted current to compensate for comparator delay and offset, thereby canceling these effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If comparator delay is reduced to improve frequency accuracy, then frequency accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvefrequency accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent measures the comparator delay in advance during manufacturing or initialization, stores this delay value, and then uses it to pre-compensate the oscillator frequency. This allows the system to achieve high frequency accuracy without requiring a high-power comparator, thereby resolving the contradiction between frequency accuracy and power consumption.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If comparator delay is trimmed to improve frequency accuracy, then frequency accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvefrequency accuracyVSAvoidtrimming circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent creates a simplified model or representation of the comparator delay characteristics, stores the measured delay values, and uses this copied information for compensation. This approach achieves frequency accuracy improvement without requiring complex real-time trimming circuits, thereby resolving the contradiction between frequency accuracy and device complexity.

Inventive Principle:
Principle #26Copying

3Measurement precision

If comparator delay compensation is implemented to improve frequency accuracy, then frequency accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvefrequency accuracyVSAvoidcompensation circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The compensation for comparator delay is performed in advance by measuring and storing the delay characteristics. During oscillator operation, the pre-measured delay values are used to adjust the frequency without requiring complex real-time compensation circuits. This approach achieves high frequency accuracy while keeping the compensation mechanism simple, thereby resolving the contradiction between frequency accuracy and device complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230396214A1RC oscillator with compensation delay
Publication Date: 2023.12.07 SAMSUNG ELECTRONICS CO LTD
  • US20230396214A1 patent drawing
  • US20230396214A1 patent drawing
  • US20230396214A1 patent drawing

AI summary

According to at least some example embodiments of the inventive concepts, an RC oscillator includes an oscillator core including a timing-circuit that includes a plurality of matched current sources, a plurality of capacitors, and a resistor, a first continuous time comparator, and a Schmitt trigger; and an analog circuit connected to the oscillator core including a second continuous time comparator representing a replica of the first continuous time comparator, and an EX-OR gate, wherein the analog circuit is configured to pass a clock signal of the oscillator core through the second continuous time comparator and obtaining a delayed clock signal representing a comparator delay, extract the comparator delay of the first continuous time comparator based on feeding the clock signal and the obtained delayed clock signal to the EX-OR gate, and charge the plurality of capacitors connected to the first continuous time comparator.