RC Oscillator Current Mirror Compensation for Stable Frequency

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Solution Overview

Problem

Conventional RC oscillators face challenges in achieving precise oscillation frequency due to transistor mismatch and the difficulty in minimizing capacitor size for integration, leading to high frequency and mismatch dispersion issues.

Innovation Solution

An RC oscillator IC incorporating an active current mirror connected to an external resistor, a feedback switching circuit, and a divider to generate compensated clock signals, which reduces the impact of transistor mismatch and allows for efficient capacitor charging and discharging, thereby stabilizing oscillation frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a capacitor is integrated into an RC oscillator IC, then the oscillation frequency can be determined by external components, but the capacitor area occupies significant space in the IC

Engineering Contradiction:
Improvefrequency determination by external componentsVSAvoidcapacitor area in IC
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent uses a small on-chip capacitor C1 as a template to determine the area of external capacitor CT. The ratio between C1 and CT is designed to be 1:(N+1), allowing the external capacitor to achieve the required timing function with minimized area. This copying approach enables frequency determination through external components while keeping the on-chip capacitor area small.

Inventive Principle:
Principle #26Copying

2Area of stationary object

If transistor size is reduced to minimize capacitor area, then integration density improves, but transistor mismatch increases leading to frequency instability

Engineering Contradiction:
Improvetransistor and capacitor areaVSAvoidtransistor matching precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent divides the current mirror function into multiple transistors (Q1-Q4) arranged in a specific configuration. This segmentation allows the use of smaller transistors while maintaining matching precision through the segmented current mirror architecture, which compensates for individual transistor variations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the operating parameters of the transistors by using a specific current mirror configuration with ratio N:1. This parameter change allows smaller transistor sizes to achieve the required precision by leveraging the current mirror ratio rather than relying solely on absolute transistor matching.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If conventional current mirrors are used, then circuit simplicity is maintained, but transistor mismatch causes frequency instability

Engineering Contradiction:
Improvecurrent mirror circuit complexityVSAvoidoscillation frequency stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements feedback mechanisms through the oscillation circuit that uses the current mirror output to control the charging and discharging of the external capacitor. This feedback loop compensates for current mirror mismatch errors, maintaining frequency stability without significantly increasing circuit complexity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces dynamic elements (switches SW1-SW6 controlled by clock signal CLK) to the current mirror circuit. This dynamic configuration allows the circuit to adapt and compensate for transistor mismatch over time, improving frequency stability while maintaining reasonable complexity.

Inventive Principle:
Principle #15Dynamics

4Reliability

If precise 50% duty clock signals are used, then current mirror operation is optimized, but clock signal generation becomes more complex

Engineering Contradiction:
Improvecurrent mirror operation accuracyVSAvoidclock signal generation circuit
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent designs the oscillation circuit to generate its own clock signal CLK internally, eliminating the need for external precise 50% duty clock signals. The circuit self-generates the required clock signal through its oscillation mechanism, reducing external requirements while maintaining current mirror operation accuracy.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively minimizes the impact of transistor mismatch, allowing for superior frequency distribution characteristics with a small-sized capacitor and eliminating the need for precise 50% duty clock signals, while ensuring stable oscillation.

Implementation Method 1

a capacitor CT, for generating an oscillation voltage according to charging- or discharging-operations

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

an active current mirror connected to an external resistor RT, for receiving a current signal corresponding to a voltage signal applied to the external resistor RT

Methodology Applied
Scientific EffectCurrent mirror effect:

Data Source

PatentUS7420431B2RC oscillator integrated circuit including capacitor
Publication Date: 2008.09.02 SEMICON COMPONENTS IND LLC
  • US7420431B2 patent drawing
  • US7420431B2 patent drawing
  • US7420431B2 patent drawing

AI summary

An RC oscillator integrated circuit includes: an active current mirror connected to an external resistor, for receiving a current signal corresponding to a voltage signal applied to the external resistor, performing 1/N-times division of the received current signal according to an input clock signal, and generating a 1/N-times current signal; an oscillation circuit for generating an output voltage corresponding to a charging- or discharging-operation of a capacitor via a current path formed by the active current mirror; a feedback switching circuit for controlling a charging- or discharging-path of the capacitor by a feedback of an output signal Vo of the oscillation circuit; and a divider for generating not only a first clock signal capable of driving the active current mirror according to the output signal of the oscillation circuit, but also a second output clock signal having a compensated mismatch of the active current mirror.