RC Phase Interpolator Switching for Linear Low-Noise Clocks

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Solution Overview

Problem

Phase interpolators face challenges in achieving good linearity and low noise performance, particularly due to the dependency on the matching of components in constant slope interpolating circuit units.

Innovation Solution

A phase interpolator design utilizing a circuit unit with a capacitor and resistors in series, where connecting switches are operated based on input clocks to control charging and discharging, allowing for interpolation of clock phases with improved linearity and noise performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If constant slope interpolating circuit units are used, then good linearity of interpolation operation is achieved, but performance becomes greatly dependent on match between current source components

Engineering Contradiction:
Improvelinearity of interpolation operationVSAvoidperformance dependency on component matching
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent introduces a capacitor as an intermediary element between the current sources and the output node. This capacitor integrates the current over time, converting the instantaneous current matching requirement into a voltage accumulation process. The output voltage becomes proportional to the integrated current, which depends on the time duration rather than precise current source matching, thereby reducing sensitivity to component variations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the operating parameter from direct current comparison to time-integrated voltage accumulation. By using the capacitor to integrate current over a controlled time period, the system transforms the interpolation mechanism from one requiring precise current source matching to one based on time-duration measurement, which is less sensitive to component tolerances.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If multiple current sources are used for interpolation, then interpolation resolution is improved, but component matching requirements and circuit complexity increase

Engineering Contradiction:
Improveinterpolation resolutionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the interpolation function into distinct time intervals rather than using multiple simultaneous current sources. Each time interval corresponds to a specific phase contribution, and the capacitor integrates the current during each interval sequentially. This temporal segmentation achieves high-resolution interpolation without requiring multiple precisely-matched current source components to operate simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs periodic switching of the connecting switches to control current flow in discrete time intervals. The switches are periodically connected and disconnected based on the input clock phases, creating a time-based modulation scheme where the capacitor accumulates charge during active intervals and holds the voltage during inactive intervals, achieving interpolation through periodic charge transfer rather than continuous analog current mixing.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables the production of an output clock with an interpolated phase between input clock phases, achieving enhanced linearity and noise performance by effectively controlling the voltage across the capacitor, thus improving the overall performance of the phase interpolator.

Implementation Method 1

a capacitor in series with the plurality of the resistors

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a plurality of resistors in parallel; for each of the resistors, a connecting switch configured to connect and disconnect

Methodology Applied
Scientific EffectElectrical resistance: Electrical Resistance

Data Source

PatentUS10608646B2Phase interpolator and interpolating method
Publication Date: 2020.03.31 HUAWEI TECH CO LTD
  • US10608646B2 patent drawing
  • US10608646B2 patent drawing
  • US10608646B2 patent drawing

AI summary

A phase interpolator to receive a first and a second input clock with a first and a second input clock edge comprises an interpolating circuit unit comprising: resistors in parallel; for each resistor, a connecting switch to connect and disconnect, as operated in accordance with one of the first and the second input clocks, the resistor to and from a first supply line; and a capacitor in series with the resistors. The phase interpolator allow controlling a partial group of the connecting switches to be operated in accordance with the first input clock, and controlling the rest of the connecting switches to be operated in accordance with the second input clock; and determine the output clock of the phase interpolator on the basis of an output signal of the interpolating circuit unit, defined by the voltage over the capacitor after the second input clock edge.