Resistive Content Addressable Memory In-Memory Computation

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Solution Overview

Problem

Current computing systems face performance degradation due to the inability of processing elements to consume data from memory at the desired rate, limiting the effectiveness of parallelism and leading to inefficient use of resources.

Innovation Solution

The development of a resistive content addressable memory (RCAM) based in-memory computation architecture, which utilizes gated memristor crossbars and arrays to enable parallel processing and eliminate the need for memory load/store operations, leveraging high-density resistive memories to support vector-based processing in mobile communication systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional memory architecture is used with separate processing elements, then data storage capacity is maintained, but processing speed and energy efficiency deteriorate due to the inability to consume data at the desired processing rate

Engineering Contradiction:
Improveprocessing speedVSAvoidenergy efficiency
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent merges memory and processing functions into a unified RCAM architecture where memory cells perform computational operations directly. The resistive crossbar array simultaneously stores data and executes computations through analog voltage operations, eliminating the separation between memory and processing units and enabling data to be processed in-place without transfer overhead.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces traditional digital logic-based processing with analog resistive computation. Instead of using conventional transistors and logic gates to process data, the system uses resistive memory cells where voltage and current relationships directly perform computational operations, substituting mechanical/electronic logic systems with analog electrical field-based computation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If parallelism is increased to improve performance, then processing throughput is improved, but resource utilization deteriorates because processing elements cannot consume data from memory at the desired rate

Engineering Contradiction:
Improveprocessing throughputVSAvoidresource utilization
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent combines memory storage and processing capabilities into the same physical structure, allowing parallel processing operations to occur directly within the memory array. This integration ensures that increased parallelism does not lead to resource underutilization, as the processing elements have direct access to data without memory bandwidth constraints.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If conventional memory architecture with load/store operations is used, then system compatibility is maintained, but energy consumption and area usage increase significantly

Engineering Contradiction:
Improvesystem compatibilityVSAvoidenergy consumption
Core Design Contradiction:
Ease of manufactureVSUse of energy by moving object

Solution Approach 1:

The patent extracts the computational functionality from separate processing units and embeds it directly within the memory structure. By taking out the need for traditional load/store operations and integrating computation into the memory fabric, the system eliminates energy-consuming data transfer operations while maintaining compatibility with existing computational paradigms through the RCAM interface.

Inventive Principle:
Principle #2Taking out (Extraction)

4Productivity

If traditional CAM-based associative processing is used, then parallel search capability is achieved, but area efficiency and energy consumption worsen due to complex circuitry requirements

Engineering Contradiction:
Improveparallel search capabilityVSAvoidarea efficiency
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent substitutes complex digital logic circuitry with analog resistive memory operations for associative processing. Instead of using traditional CAM cells with multiple transistors and logic gates per cell, the system uses resistive crossbar arrays where parallel search is achieved through analog voltage division and current measurement, dramatically reducing the area required per processing element.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The RCAM architecture achieves significant energy and area efficiency, being at least an order of magnitude more energy-efficient and area-efficient compared to existing systems, enabling scalable and low-cost mobile processing architectures for advanced wireless systems.

Implementation Method 1

resistive content addressable memory (RCAM) based in-memory computation architectures... utilizes gated memristor crossbars and arrays

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Implementation Method 2

leveraging high-density resistive memories to support vector-based processing

Methodology Applied
Scientific EffectMemristor effect: Electrical Resistance

Data Source

PatentEP3304557B1Resistive content addressable memory based in-memory computation architecture
Publication Date: 2023.12.13 KING ABDULLAH UNIV OF SCI & TECH
  • EP3304557B1 patent drawingFigure 1
  • EP3304557B1 patent drawingFigure 2A~2B
  • EP3304557B1 patent drawingFigure 3~4B

AI summary

Various examples are provided examples related to resistive content addressable memory (RCAM) based in-memory computation architectures. In one example, a system includes a content addressable memory (CAM) including an array of cells having a memristor based crossbar and an interconnection switch matrix having a gateless memristor array, which is coupled to an output of the CAM. In another example, a method, includes comparing activated bit values stored a key register with corresponding bit values in a row of a CAM, setting a tag bit value to indicate that the activated bit values match the corresponding bit values, and writing masked key bit values to corresponding bit locations in the row of the CAM based on the tag bit value.