RDAC Calibration Using Gain and Offset Error Correction
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Solution Overview
Problem
VLSI-based resistor digital-to-analog converters (RDACs) in rheostat mode suffer from significant die-to-die variation in output resistance due to manufacturing process variability, leading to non-proportional output resistance and reduced performance compared to discrete resistors.
Innovation Solution
A calibration method and system that uses a calibration code engine to generate a calibrated digital code based on resistance versus digital code characteristic curves, accounting for offset and gain errors, and stores these corrections in memory to ensure accurate output resistance, thereby maintaining linearity and differential non-linearity errors within specifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If VLSI-based RDACs are used in rheostat mode, then integration and miniaturization are achieved, but output resistance varies significantly due to manufacturing process variability
Solution Approach 1:
The patent measures and stores calibration data during manufacturing before the product is deployed. The RDAC is characterized at factory conditions, and correction lookup tables are pre-computed and stored in on-chip memory. During operation, the appropriate calibration data is retrieved and applied to correct for process variations, eliminating the need for real-time adjustment mechanisms.
Solution Approach 2:
The patent implements a feedback mechanism where the digital input code is used to index into lookup tables that contain pre-computed correction factors. These correction factors are derived from actual measured data and are applied to compensate for process variations. The feedback loop closes by comparing the desired resistance value with the corrected output, ensuring accuracy despite manufacturing tolerances.
2Device complexity
If standard RDAC design is used, then device complexity is low, but output resistance is not proportional to digital input due to process variability
Solution Approach 1:
The patent pre-characterizes each RDAC device during manufacturing by measuring its actual resistance values across all digital input codes. These measurements are used to generate correction lookup tables that are stored in on-chip memory. This preliminary action captures device-specific variations and enables accurate compensation without adding complex circuitry during normal operation.
Solution Approach 2:
The patent creates a digital copy of the RDAC's actual resistance characteristics in the form of lookup tables. Instead of modifying the physical resistor values or adding complex analog correction circuits, the patent stores measured data in digital form and uses this digital copy to generate corrected output codes. This approach maintains simplicity while achieving high accuracy.
3Productivity
If no calibration is performed, then manufacturing cost and process time are reduced, but output resistance accuracy deteriorates with die-to-die variation
Solution Approach 1:
The patent performs calibration measurements during the manufacturing process and stores the results in on-chip memory before the device is shipped. This preliminary characterization captures each device's unique characteristics, and the stored data is used during operation to ensure accuracy. The calibration data is obtained once during manufacturing and then reused indefinitely, avoiding the need for continuous real-time calibration.
Solution Approach 2:
The patent enables each RDAC device to self-correct for its own process variations using pre-stored calibration data. The device uses its digital input code to automatically retrieve the appropriate correction factors from lookup tables and apply them to generate accurate output. This self-service approach eliminates the need for external calibration equipment or complex external correction circuits.
Data Source
AI summary
A system and method for calibrating an RDAC to obtain an expected resistance are disclosed. In one embodiment, a method of obtaining an expected resistance from an RDAC circuit includes receiving a digital signal comprising a digital code by an on-chip calibration code engine, automatically deriving a calibrated digital code based on resistance versus digital code characteristic curves of an expected RDAC and the RDAC associated with the calibration code engine, and inputting the calibrated digital code into the RDAC associated with the calibration code engine to obtain an expected resistance. The method also includes forming the resistance versus digital code characteristic curves of the expected RDAC and the RDAC, computing a gain error and an offset error using the formed resistance versus digital code characteristic curves of the RDAC and the expected RDAC and storing the gain error and the offset error in a non-volatile/volatile RDAC memory.