Package structure, semiconductor device and manufacturing method thereof
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Solution Overview
Problem
3D integrated circuits (3DICs) face challenges with high heat density and poor thermal dissipation, leading to hot spots that affect electrical performance and cause electromigration and reliability issues.
Innovation Solution
Incorporation of heat-conductive dielectric materials like aluminum nitride and boron nitride in redistribution layers, combined with thick electrically conductive layers, to create efficient heat dissipation paths and reduce thermal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 3D IC systems with increased chip density are used, then chip density is improved, but heat dissipation performance deteriorates
Solution Approach 1:
The patent introduces a thick redistribution layer (RDL) structure with heat-conductive dielectric material that extends vertically through multiple die layers, creating a three-dimensional heat dissipation pathway. This vertical heat conduction path allows heat to be conducted away from hot spots in the inner dies through the thick RDL to outer dies or package substrates, effectively addressing thermal management in 3D stacked architectures without compromising chip density.
Solution Approach 2:
The patent employs composite material structures combining heat-conductive dielectric materials with conductive layers in the redistribution layer assembly. This composite structure provides both electrical redistribution functionality and enhanced thermal conduction, allowing simultaneous achievement of high chip density and improved heat dissipation performance through material composition rather than structural simplification.
2Power
If heat is generated in inner dies of 3DIC, then chip functionality is achieved, but local temperature peak (hot spot) occurs
Solution Approach 1:
The thick redistribution layer with heat-conductive dielectric material acts as an intermediary thermal conduction path between the heat-generating inner dies and the heat-dissipating outer dies or package substrates. This intermediary structure provides a dedicated thermal pathway that facilitates heat transfer from hot spots without interfering with the electrical functionality of the stacked dies, effectively reducing local temperature peaks while maintaining chip operation.
3Loss of energy
If heat dissipation is improved, then thermal management is enhanced, but device complexity increases
Solution Approach 1:
The thick redistribution layer structure serves multiple functions simultaneously: it provides electrical signal redistribution between stacked dies, acts as a thermal conduction pathway for heat dissipation, and maintains structural integrity of the 3D package. This multi-functionality allows heat dissipation enhancement without proportionally increasing device complexity, as the same structural element performs both electrical and thermal management roles.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances thermal dissipation, maintaining chip operating temperatures within desirable ranges, improving performance and preventing electromigration and reliability issues.
Implementation Method 1
InFO package with heat-conductive dielectric material and thick electrically conductive layer
Data Source
AI summary
A package structure includes a solder feature, a first redistribution layer structure on the solder feature, and a die mounted on and electrically coupled to the first redistribution layer structure. The first redistribution layer structure includes one or more dielectric layers filled with a heat conductive dielectric material.