Redistribution Layer Groove Structure for Cleaner Wafer Probe Contact

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Solution Overview

Problem

In semiconductor manufacturing, test probes face difficulties in piercing Input/Output (I/O) pads due to the characteristics of redistribution layers (RDLs), leading to contamination and damage during wafer acceptance tests.

Innovation Solution

A semiconductor structure is designed with a substrate featuring a first groove and a second groove connected to each other, where the second groove exposes a pad, and a redistribution layer is formed on the surface of the pad, inner walls, and bottom of the grooves, reducing the height difference and facilitating easier probe insertion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a redistribution layer is formed with standard RDL characteristics, then electrical connection between I/O pads and packaging substrates is achieved, but test probes cannot easily pierce the I/O pads and are susceptible to contamination or damage

Engineering Contradiction:
Improvetest probe reliabilityVSAvoidtest probe insertion ease
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The invention divides the single RDL structure into two separate RDLs positioned at different heights. The first RDL is at a higher position with better accessibility for test probes, while the second RDL is at a lower position providing electrical connection functionality. This segmentation allows test probes to easily access the first RDL without contending with the obstructive characteristics of a single integrated RDL structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces a vertical dimension by positioning the first RDL at a higher position and the second RDL at a lower position. This three-dimensional arrangement allows test probes to access the higher first RDL without interference, while the lower second RDL maintains the electrical connection function. The height difference creates spatial separation that resolves the contradiction between probe accessibility and electrical connection integrity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If the redistribution layer is made larger to facilitate test probe access, then test probe insertion is improved, but the height difference between the top surface of the redistribution layer and the top surface of the pad increases

Engineering Contradiction:
Improvetest probe insertion easeVSAvoidheight difference
Core Design Contradiction:
Ease of operationVSLength of stationary object

Solution Approach 1:

By segmenting the RDL into two separate structures at different heights, the invention allows the first RDL to be enlarged for better probe access without requiring an excessive overall height difference. The functional separation means each RDL can be optimized independently - the first RDL for accessibility and the second for electrical connection - thereby managing the height difference parameter more effectively.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first RDL acts as an intermediary structure between the test probes and the second RDL. Test probes interact with the first RDL at a higher, more accessible position, which mediates the interaction and reduces the need for excessive height differences. This intermediary structure facilitates easy probe insertion while maintaining a more manageable overall height profile compared to a single large RDL.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12074126B2Semiconductor structure and method of manufacturing same
Publication Date: 2024.08.27 CHANGXIN MEMORY TECH INC
  • US12074126B2 patent drawing
  • US12074126B2 patent drawing
  • US12074126B2 patent drawing

AI summary

A semiconductor structure and a method of manufacturing the semiconductor structure are provided. The semiconductor structure includes a substrate including a plurality of pads spaced apart from each other, a first groove, and a second groove connected with the first groove, the first and the second grooves located in the substrate. The first groove is located on the side of the second groove away from the plurality of pads, and the bottom of the second groove exposes a corresponding pad of the plurality of pads. The orthographic projection of the second groove on the substrate is located within the orthographic projection of the first groove on the substrate. A redistribution layer is disposed on a surface of the corresponding pad, the inner wall of the first groove, and the inner wall and the bottom of the second groove. The semiconductor structure prevents contamination or damage of test probes.