Redistribution Layer Power Grid via RTM Vias
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Solution Overview
Problem
As integrated circuits become more complex, voltage drop (IR drop) in the power distribution network increases, leading to reduced switching speeds, decreased noise margins, and potential premature failure due to high current densities, necessitating a more robust power distribution network that minimizes the number of metal layers to maintain chip reliability and reduce manufacturing costs.
Innovation Solution
The implementation of a robust power distribution network in an integrated circuit package that includes a first metal layer coupled to a bonding pad, a redistribution layer (RDL) coupled to the metal layer, and RDL-to-metal (RTM) vias, which provide additional power routing and reduce IR drop while minimizing the number of metal layers, thereby maintaining chip performance and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the size of the die's power grid is increased to decrease IR drop, then voltage delivery improves, but the number of metal layers increases and manufacturing cost increases
Solution Approach 1:
The patent introduces RTM vias that connect the RDL to multiple metal layers (including lower layers) vertically, creating a three-dimensional power distribution network. This allows power to be delivered through additional spatial dimensions rather than solely through horizontal expansion of metal layers, reducing IR drop without proportionally increasing the number of metal layers.
Solution Approach 2:
The RDL power grid is nested within the existing metal layer structure, with RTM vias penetrating through the RDL to connect to multiple metal layers. This nested configuration allows the RDL to serve as an additional power distribution layer that leverages the existing metal layer infrastructure, avoiding the need to add numerous separate metal layers.
2Reliability
If the size of the die's power grid is increased to decrease IR drop, then voltage delivery improves, but manufacturing cost increases
Solution Approach 1:
The RDL is designed to serve dual functions: signal redistribution and power distribution. By utilizing the RDL's existing structure and adding RTM vias for power delivery, the patent eliminates the need for dedicated power distribution layers, thereby reducing manufacturing complexity and cost while improving voltage delivery.
Solution Approach 2:
The patent merges the power distribution function with the signal redistribution function by using the RDL for both purposes. The RTM vias connect the RDL to multiple metal layers, allowing a single structure to handle both signal and power distribution, thereby reducing the total number of layers and manufacturing cost.
3Productivity
If conductor size is reduced to increase device density, then number of devices increases, but current density increases and IR drop increases
Solution Approach 1:
The RTM via structure creates additional vertical current paths from the RDL to multiple metal layers, effectively adding dimensional capacity to the power distribution network. This allows higher device density on the chip surface without increasing horizontal current density in individual conductors, thereby maintaining lower IR drop despite increased device density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces IR drop, enhancing switching speeds and noise margins while maintaining chip reliability and reducing manufacturing costs by providing a more direct and efficient power distribution path within the redistribution layer, thus addressing the limitations of conventional power distribution networks.
Implementation Method 1
a RDL to Metal (RTM) via coupled to a first surface of the metal layer and further coupled to a first surface of the first RDL
Data Source
AI summary
An integrated circuit package including a first metal layer coupled to a bonding pad, a first redistribution layer coupled to the bonding pad, and a RDL to Metal (RTM) via coupled to a first surface of the metal layer and further coupled to a first surface of the first RDL is described. The IC package may further include additional metal layers and redistribution layers.