Semiconductor Package Assembly RDL Structure
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Solution Overview
Problem
Conventional semiconductor packages face challenges in accommodating larger semiconductor dies due to limited bonding area, which hinders miniaturization and multi-functionality in electronic products.
Innovation Solution
The semiconductor package assembly incorporates a redistribution layer (RDL) structure with a die-attach surface and a bump-attach surface, featuring a first solder mask layer surrounding the semiconductor die and additional circuit structures with T-shaped conductive structures that pass through the solder mask, allowing for increased bonding area and flexible pad positioning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the semiconductor die size is increased to support multi-pin connection and high functionality, then the bonding area is insufficient, but increasing the package size contradicts the miniaturization requirement
Solution Approach 1:
The patent extends the circuit pattern laterally over the top surface of the solder resist layer, utilizing the third dimension (height/depth) to create an enlarged bonding area. The conductor width at the top surface is greater than the conductor width at the penetration point, effectively using vertical space to increase functional area without expanding the horizontal package footprint.
Solution Approach 2:
The conductor structure is nested through the solder resist layer, with the upper portion extending over the surface and the lower portion penetrating through to connect with the semiconductor die. This nested configuration allows the bonding area to be enlarged while maintaining a compact overall structure.
2Area of stationary object
If conventional semiconductor package structures are used, then the die attachment area is limited, but enlarging the package size contradicts miniaturization goals
Solution Approach 1:
The conductor is designed with different widths at different heights, creating a tapered or expanded structure that increases the die attachment area at the top surface while maintaining a compact base structure. This dimensional transition allows larger bonding area without proportional increase in package length.
3Volume of moving object
If the conductor width is reduced to penetrate through the solder resist layer, then the connection is more compact, but the bonding area is reduced
Solution Approach 1:
The conductor structure is nested through the solder resist layer, with the upper portion extending over the surface and the lower portion penetrating through to connect with the semiconductor die. This nested configuration allows the bonding area to be enlarged while maintaining a compact overall structure.
Solution Approach 2:
The conductor width transitions from larger at the top surface to smaller at the penetration point, utilizing the vertical dimension to reconcile the conflict between bonding area and connection compactness.
Data Source
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AI summary
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a redistribution layer (RDL) structure die-attach surface and a bump-attach surface opposite the die-attach surface. A semiconductor die is mounted on the die-attach surface of the redistribution layer (RDL) structure. A first solder mask layer is disposed on the die-attach surface. The first solder mask layer surrounds the semiconductor die. An additional circuit structure is disposed on a portion of the first solder mask, surrounding the semiconductor die. The additional circuit structure comprises a pad portion having a first width and a via portion has a second width that is less than the first width. The via portion passes through the first solder mask layer to be coupled the redistribution layer (RDL) structure.