Redistribution Layer Undercut Prevention via Embedded Integration
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Solution Overview
Problem
Conventional redistribution layer (RDL) processes suffer from undercut issues during copper seed etch, leading to reduced mechanical integrity and signal integrity due to etchant attack, which becomes more pronounced as RDL dimensions shrink.
Innovation Solution
Alternative integration schemes involving a dielectric layer, patterned photoresist, and electroplating processes that minimize undercut by using a partially or fully embedded RDL process, where a dielectric layer is applied and patterned, followed by a barrier and copper seed layer, and then electroplating, with optional planarization, to maintain RDL dimensions and mechanical integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional RDL process with wet chemical etch is used to remove copper seed, then seed removal is achieved, but undercut occurs beneath the RDL pattern reducing mechanical integrity
Solution Approach 1:
The patent segments the RDL process into multiple integration schemes (fully embedded, partially embedded, and conventional) with distinct process flows. The fully embedded scheme segments the copper deposition into two stages: electroplating through patterned photoresist followed by electroless plating to fill remaining spaces, eliminating the need for seed etch and thus preventing undercut while maintaining structural integrity
Solution Approach 2:
The patent applies preliminary action by embedding the copper RDL structure within dielectric material before completing the deposition process. In the fully embedded scheme, dielectric is deposited over the patterned photoresist before copper electroplating, creating a protective environment that prevents etchant access and eliminates undercut formation during subsequent processing
2Area of moving object
If RDL dimensions are shrunk to continue scaling, then device density is improved, but undercut area increases reducing signal integrity
Solution Approach 1:
The patent transitions from a planar 2D RDL structure to a 3D embedded structure by depositing dielectric material over and around the copper RDL patterns. This dimensional change embeds the copper traces within the dielectric matrix, protecting them from lateral etchant attack and preventing undercut expansion even as feature sizes shrink, thereby maintaining signal integrity at smaller dimensions
3Device complexity
If conventional process flow is used, then process simplicity is maintained, but undercut causes poor mechanical and signal integrity
Solution Approach 1:
The patent merges multiple functions into the dielectric deposition step in the fully embedded scheme. The dielectric serves as both the embedding medium for the copper RDL and as a protective barrier during subsequent processing. This merging eliminates the need for separate seed etch steps and photoresist removal, simplifying the overall process while preventing undercut and improving mechanical integrity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These processes effectively reduce undercut and maintain RDL pattern dimensions and mechanical integrity by minimizing seed etch, resulting in improved signal integrity and structural robustness.
Implementation Method 1
The photoresist is exposed, developed, and descummed to expose the copper seed in an RDL pattern
Implementation Method 2
This patterned area is then filled with copper via an electroplating process
Implementation Method 3
During the seed removal step (via wet chemical etch), the etchant attacks the copper seed at the pattern/seed interface producing undercut beneath the RDL pattern
Data Source
AI summary
In one example, a method for redistribution layer (RDL) process is described. A substrate is provided. A dielectric layer is deposited on top of the substrate. The dielectric layer is patterned. A barrier and copper seed layer are deposited on top of the dielectric layer. A photoresist layer is applied on top of the barrier and copper seed layer. The photoresist layer is patterned to correspond with the dielectric layer pattern. Copper is electrodepositing in the patterned regions exposed by the photoresist layer. The photoresist layer is removed. The copper and seed barrier are etched.