Semiconductor Package RDL with Varying Pad Sizes

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Solution Overview

Problem

The manufacturing of 2.5 or 3-dimensional semiconductor packages with through silicon via (TSV) interposers is costly and inflexible due to uniform conductive pad sizes, which limits connection capabilities between chips with different sized conductive pads.

Innovation Solution

Replacing TSV interposers with silicon bridge interposers that include redistribution layers (RDLs) with pads of varying sizes to facilitate connections between chips, allowing for flexible and cost-effective manufacturing of semiconductor device packages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If TSV interposers are used to achieve fine line or fine pitch connection between different chips, then connection precision is improved, but manufacturing cost and difficulty increase

Engineering Contradiction:
Improvefine line or fine pitch connectionVSAvoidmanufacturing cost and difficulty
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent changes the fundamental structure from TSV (through silicon via) to RDL (redistribution layer) with varying pad sizes. This parameter change allows achieving fine line/fine pitch connections through planar RDL routing instead of vertical TSV structures, thereby improving manufacturing ease while maintaining connection precision

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a simpler, more cost-effective RDL structure that can be manufactured using standard PCB-like processes rather than expensive TSV fabrication. The RDL acts as a disposable interconnection layer that achieves the required fine pitch connections without the high cost and complexity of TSV interposers

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Ease of manufacture

If TSV interposer conductive pads are made with uniform size or pitches, then manufacturing simplicity is improved, but adaptability to chips with different sized conductive pads deteriorates

Engineering Contradiction:
Improveuniform pad size or pitchesVSAvoidconnection between chips with different sized conductive pads
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent implements local quality by creating RDL pads with varying sizes at different locations to match the specific pad sizes of different chips. The RDL structure provides locally optimized pad sizes (e.g., first pad size for first chip, second pad size for second chip) while maintaining overall manufacturing simplicity through a single planar layer approach

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The RDL structure serves multiple functions: it provides interconnection between chips, adapts to different pad sizes through varying pad dimensions, and enables fine pitch connections through its planar routing capability. This universal structure replaces the need for customized TSV interposers for different chip configurations

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10797022B2Semiconductor device package and method of manufacturing the same
Publication Date: 2020.10.06 ADVANCED SEMICON ENG INC
  • US10797022B2 patent drawing
  • US10797022B2 patent drawing
  • US10797022B2 patent drawing

AI summary

A semiconductor device package includes a first redistribution layer (RDL), a first die, a second die, a second RDL and an encapsulant. The first die is disposed on the first RDL and is electrically connected to the first RDL. The first die has a first electrical contact. The second die is disposed on the first RDL and is electrically connected to the first RDL. The second die has a first electrical contact. The second RDL is surrounded by the first RDL. The second RDL has a first electrical contact electrically connected to the first electrical contact of the first die and a second electrical contact electrically connected to the first electrical contact of the second die. A size of the first electrical contact of the second RDL is greater than a size of the second electrical contact of the second RDL.