RDL Via Array Layout for Flexible Fan-Out Pad-to-Bump Routing
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Solution Overview
Problem
The design of multi-layer redistribution circuit structures for fan-out packages is burdensome due to the large number of via and land interconnect patterns required, which increases runtime and complexity, especially when dealing with C4 bumps under thermal stress and varying pitch sizes.
Innovation Solution
An interconnect structure featuring an intermediate via land pad with a cluster of upper conductive vias and an array of lower conductive vias arranged within a horseshoe-shaped via array region, allowing for flexible and efficient routing that avoids overlap and accommodates different C4 bump pitches by rotating the array of lower conductive vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional via and land interconnect patterns are used for each pad-to-bump connection, then all pad-to-bump relative positions can be accommodated, but the design runtime increases and the design process becomes burdensome
Solution Approach 1:
The horseshoe-shaped via array region serves multiple functions: it accommodates varying numbers of lower conductive vias (from 2 to 8 or more), supports different C4 bump pitches, and works with various intermediate via land pad shapes (circular, rectangular, square, polygonal, oval, or irregular). This universal design eliminates the need for thousands of separate interconnect patterns while maintaining adaptability to all pad-to-bump relative positions.
Solution Approach 2:
The design allows parameter changes in the number of lower conductive vias, their spacing, and their arrangement within the horseshoe-shaped region to accommodate different C4 bump pitches and thermal stress conditions. The array can be configured with 2, 4, 6, 8, or more vias depending on the specific application requirements, providing flexibility without requiring complete redesign.
2Reliability
If C4 bumps are designed with larger size and pitch to handle thermal stress, then reliability under thermal expansion mismatch improves, but the location mismatch between C4 bumps and corresponding I/O pads or micro-bumps increases
Solution Approach 1:
The intermediate via land pad acts as an intermediary element between the lower circuit pads (connected to I/O pads or micro-bumps) and the upper via land pad (connected to C4 bumps). This intermediate structure allows the lower conductive vias to connect to smaller I/O pads while the upper conductive vias connect to larger C4 bumps, mediating the transition between different size and pitch requirements and eliminating direct location matching constraints.
3Ease of operation
If the array of lower conductive vias is arranged within the horseshoe-shaped via array region, then overlap with upper conductive vias is avoided and routing flexibility improves, but the via land pad geometry becomes more complex
Solution Approach 1:
The horseshoe-shaped via array region introduces asymmetric geometry that naturally prevents overlap between lower and upper conductive vias. The horseshoe shape (resembling a 'C' or crescent) creates an inherent spatial separation where lower vias are positioned along the curved perimeter while upper vias are positioned centrally, eliminating the need for complex routing constraints while maintaining routing flexibility.
Data Source
AI summary
An interconnect structure for a redistribution layer includes an intermediate via land pad; a cluster of upper conductive vias abutting the intermediate via land pad and electrically coupling the intermediate via land pad to an upper via land pad; and an array of lower conductive vias electrically coupling the intermediate via land pad with a lower circuit pad. The array of lower conductive vias is arranged within a horseshoe-shaped via array region extending along a perimeter of the intermediate via land pad. The array of lower conductive vias arranged within the horseshoe-shaped via array region does not overlap with the cluster of upper conductive vias.