RDMA Buffer Address Piggybacking in Acknowledgement Messages

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Solution Overview

Problem

Traditional RDMA buffer registration processes in distributed data stores result in high latency, affecting I/O performance due to the need for repeated registration for every remote RDMA operation.

Innovation Solution

Implementing a system where RDMA buffers are pre-registered and the target address of a next available buffer is piggybacked onto acknowledgement messages, eliminating the need for extra messages and reducing latency by performing buffer registration only during initialization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If RDMA buffer registration is performed for every remote RDMA operation, then the target buffer address can be correctly shared between nodes, but latency increases and I/O performance deteriorates

Engineering Contradiction:
Improvecorrect buffer address sharingVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs RDMA buffer registration in advance during system initialization or before actual data transfer operations. The target buffer addresses are pre-shared between nodes through internode communication, so that when RDMA operations need to occur, the buffer registration is already complete, eliminating the latency that would otherwise be introduced by performing registration at the time of each operation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If RDMA buffer registration is performed before every remote RDMA operation, then buffer availability is ensured, but the number of communication steps increases

Engineering Contradiction:
Improvebuffer availabilityVSAvoidnumber of communication steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system combines the buffer registration process with the initial connection establishment or system initialization phase. Instead of treating buffer registration as a separate step that must occur before each RDMA operation, it merges the registration activity with existing communication workflows, thereby reducing the total number of distinct communication steps while ensuring buffer availability is maintained.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If traditional Ethernet networks and client-server architectures are used, then system compatibility is maintained, but latency is high unless sufficient CPU cores are provisioned

Engineering Contradiction:
Improvesystem compatibilityVSAvoidlatency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system introduces an intermediary mechanism where the RDMA-enabled network adapter directly manages buffer registration and address sharing between nodes, bypassing the need for traditional CPU-mediated communication protocols. This intermediary layer allows the system to maintain compatibility with standard Ethernet networks while achieving lower latency through direct memory access and pre-registered buffers.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10176144B2Piggybacking target buffer address for next RDMA operation in current acknowledgement message
Publication Date: 2019.01.08 SAMSUNG ELECTRONICS CO LTD
  • US10176144B2 patent drawing
  • US10176144B2 patent drawing
  • US10176144B2 patent drawing

AI summary

A data storage system configured as node in a distributed data store is presented. The system comprises an RDMA-enabled network adapter, a buffer management unit, and an RDMA application interface. The network adapter is configured to establish communication with one or more other nodes in the distributed data store. The buffer management unit is configured to pre-register a plurality of memory blocks as RDMA buffers with one or more other nodes. The RDMA application interface is configured to: process RDMA operations initiated by one of the other nodes, and send an acknowledgement message to the one of the other nodes via the RDMA-enabled network adapter in response to completion of an RDMA operation initiated by the one of the other nodes, wherein the acknowledgement message includes a target address corresponding to a start address of an RDMA buffer available for use in a subsequent RDMA operation.