RDMA NIC Sector Atomic Access Without CPU Coordination

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Solution Overview

Problem

Existing RDMA protocols and network cards lack sector atomicity features, leading to performance impacts and complexity due to the need for server CPU involvement and multiple network round trips in high-speed distributed storage systems.

Innovation Solution

Implementing a method and RNIC that define sector atomic memory regions with counters for RDMA requests, using atomic compare and swap operations to manage access, avoiding CPU involvement and reducing round trips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sector atomicity is implemented using server software coordination, then data consistency is improved, but performance deteriorates due to CPU involvement and multiple network round trips

Engineering Contradiction:
Improvedata consistencyVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the atomicity coordination function from the server software stack and relocates it to the RNIC hardware. The RNIC now independently manages sector-level atomic operations using dedicated hardware resources (counter arrays, state machines) without requiring CPU intervention or additional software coordination layers, thus maintaining data consistency while eliminating performance penalties.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a hardware intermediary (RNIC) between the client and storage media that mediates atomic operations. The RNIC uses hardware counters and compare-and-swap operations to coordinate read-write conflicts at the sector level, replacing the software-mediated coordination that previously required CPU involvement and degraded performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If journal-based storage structure is used, then sector atomicity is improved, but write amplification increases impacting PM media efficiency

Engineering Contradiction:
Improvesector atomicityVSAvoidwrite amplification
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent extracts the atomicity guarantee mechanism from the storage software layer and implements it directly in RNIC hardware. This eliminates the need for journal-based structures that require additional write operations, as the hardware compare-and-swap operations provide atomicity without creating write amplification on the PM media.

Inventive Principle:
Principle #2Taking out (Extraction)

3Speed

If direct RDMA access to PM is implemented, then access speed is improved, but sector atomicity cannot be guaranteed without software intervention

Engineering Contradiction:
Improveaccess speedVSAvoidsector atomicity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent enables the RNIC to self-manage sector atomicity without external software intervention. The RNIC uses hardware-based compare-and-swap operations and counter arrays to automatically detect and resolve conflicts between concurrent read and write operations at the sector level, maintaining atomicity guarantees while preserving direct RDMA access performance.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250355831A1Random direct memory access network interface controller
Publication Date: 2025.11.20 HUAWEI CLOUD COMPUTING TECHNOLOGIES CO LTD
  • US20250355831A1 patent drawing
  • US20250355831A1 patent drawing
  • US20250355831A1 patent drawing

AI summary

In order to control a Random Direct Memory Access, RDMA to atomic data sectors defined is a sector atomic memory region (102) including atomic sectors (106A-N) of a predefined size to which a RDMA Network Interface Controller, RNIC (100, 202), provides access only to RDMA requests for atomic sectors that are sector size aligned and span one or more of the sectors. An array of counters is created to include a several bit counter for each atomic sector in the sector atomic memory region. Each counter has a bit 0 configured as a write lock bit and further bits configured as read counter bits to be indicative of ongoing operations with the associated atomic sector. The RNIC then handles RDMA requests for an atomic sector from a client using a counter of the atomic sector.