Multi-node Zero-copy Packet Processing via RDMA
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Solution Overview
Problem
Current edge cloud networks face significant latency issues due to high internode latencies associated with traditional networking protocols and hardware, making it challenging to achieve the required 1-4 millisecond round-trip latency for 5G communication, especially when virtual network functions (VNFs) are spread across multiple physical nodes.
Innovation Solution
Implementing a system with multiple physical nodes that use remote direct memory access (RDMA) for data packet processing, where each node executes instructions to classify, batch, and control access to data packets, allowing for efficient data transfer and processing without involving a central processing unit, thereby reducing latency and enhancing throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If virtual network functions are spread across multiple physical nodes using traditional networking protocols, then network functionality and distribution are improved, but inter-node latency increases making it difficult to achieve 1-4 millisecond round-trip latency
Solution Approach 1:
The patent introduces RDMA (Remote Direct Memory Access) as an intermediary mechanism that enables direct memory access between physical nodes without going through traditional networking protocol stacks. This intermediary layer bypasses the CPU and protocol processing, directly transferring data packets between nodes and achieving sub-millisecond latency while maintaining distributed VNF architecture
Solution Approach 2:
The patent extracts the data packet processing function from the traditional networking protocol stack and CPU, separating it into a dedicated RDMA pathway. By taking out the packet processing from the general-purpose CPU and protocol layers, the system achieves ultra-low latency for inter-node communication while maintaining the distributed architecture
2Ease of operation
If data packets are processed through virtual network functions using traditional CPU-based methods, then network functions are performed, but accumulated CPU cycles increase round-trip latency beyond the 1-4 millisecond requirement
Solution Approach 1:
The patent replaces the mechanical CPU-based packet processing system with a direct memory access system using RDMA. Instead of using CPU cycles to process each packet through virtual network functions, the system uses hardware-level memory access operations that bypass the CPU entirely, reducing processing time to microsecond levels and enabling 1-4 millisecond round-trip latency
3Reliability
If traditional networking hardware and protocols are used for inter-node communication, then network connectivity is established, but protocol delays and hardware limitations prevent achieving ultra-low latency
Solution Approach 1:
The patent extracts data packet transmission from the traditional networking protocol stack, removing it from layers 2-7 of the OSI model. By taking out packet processing from TCP/IP protocols, HTTP, and other standard networking layers, the system achieves direct hardware-level communication with minimal protocol overhead, maintaining reliability through RDMA's error handling while eliminating protocol delays
Data Source
AI summary
In a system having multiple locally deployed apparatus arranged as separate physical nodes, each data packet of a set of data packets received in a physical node can be classified. Data packets of the set can be batched into one or more batches for processing by a physical node separate from the physical node in which the data packets are classified and batched. Access to a batch in the physical node by another physical node can be controlled using remote data memory access. Additional apparatus, systems, and methods are disclosed.