Re-reference Aware Tile Walk Order for GPU Binning

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Solution Overview

Problem

The existing graphics processing unit (GPU) architectures face increased DRAM traffic and power consumption due to re-referencing of screen-space tiles across batches, which leads to suboptimal performance and inefficient memory access patterns.

Innovation Solution

The method involves determining a tile-processing order for one batch based on the observed order of another batch, processing tiles in temporal proximity to reduce DRAM traffic by utilizing data locality and updating the order as tiles are processed, thereby reversing or modifying the processing direction across batches to keep frequently accessed tiles in cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If primitives from different draw calls are processed in sequence using traditional binning architecture, then the processing pipeline is simple and straightforward, but DRAM traffic increases and memory access efficiency deteriorates due to re-referencing of screen-space tiles across batches

Engineering Contradiction:
ImproveGPU performanceVSAvoidDRAM traffic
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies dynamics by making the tile processing order adaptive and variable rather than fixed. The system dynamically adjusts the processing sequence of tiles based on their spatial relationships and access patterns across different batches, transitioning from a static traditional binning approach to a dynamic reordering mechanism that optimizes memory access efficiency

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback by observing and utilizing the processing order of tiles from previous batches to determine the processing order for current batches. This feedback mechanism allows the system to learn from historical access patterns and adjust future processing sequences to minimize DRAM traffic and maximize cache utilization

Inventive Principle:
Principle #23Feedback

2Adaptability or versatility

If screen-space tiles are re-referenced across batches, then all tiles can be processed uniformly, but memory bandwidth is exhausted and power consumption increases

Engineering Contradiction:
Improvetile processing flexibilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by treating different tiles differently based on their specific characteristics and access patterns. Instead of uniform processing, the system identifies and prioritizes tiles that are likely to be re-referenced across batches, applying specialized processing orders to these local regions while maintaining simpler processing for other tiles

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements preliminary action by determining the processing order of tiles in advance based on observed patterns from previous batches. The system pre-calculates and establishes optimal processing sequences before actual rendering occurs, allowing tiles to be processed in an order that anticipates future access needs and minimizes memory traffic

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If traditional binning architecture is used, then implementation is straightforward, but data locality is poor leading to frequent memory accesses

Engineering Contradiction:
Improveimplementation simplicityVSAvoiddata locality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies dimensionality change by adding a temporal dimension to the traditional spatial binning approach. Instead of only considering spatial relationships, the system incorporates temporal information about processing order across batches, creating a multi-dimensional processing strategy that optimizes both space and time for memory access efficiency

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11538221B2Re-reference aware tile walk order for primitive binner
Publication Date: 2022.12.27 SAMSUNG ELECTRONICS CO LTD
  • US11538221B2 patent drawing
  • US11538221B2 patent drawing
  • US11538221B2 patent drawing

AI summary

A method to process tiles of a screen space includes determining a tile-processing order for tiles of a first batch of primitives based on a tile-processing order for a second batch of primitives in which the second batch of primitives are processed prior to the first batch of primitives. The tiles of the first batch of primitives are processed based on the tile-processing order determined for the tiles of the first batch of primitives. The tile-processing order is updated as tiles of the first batch of primitives are pushed to a backend processing portion of a graphics processing unit. In one embodiment, determining the tile-processing order for the tiles of the first batch of primitives include arranging the tiles of the first batch of primitives that have a same screen-space as tiles of the second batch of primitives based on a most-recently-processed-tile-to-a-least-recently-processed tile order of the second batch of primitives.