Read-as-X Memory Pages for Sparse Value Mapping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory management systems inefficiently handle large regions of memory that need to be set to a specified value, leading to excessive physical memory allocation and performance issues due to cache and memory access latencies.
Innovation Solution
Implementing a 'read-as-X' property in page table information to associate memory pages with a specified value X, allowing reads to return this value without committing physical memory, thereby optimizing memory usage and reducing access latencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If physical memory is allocated for regions of memory address space known to have a specified value, then the memory can store the specified value, but physical memory utilization becomes inefficient and read latency increases
Solution Approach 1:
The patent extracts the value storage function from physical memory by introducing a read-as-X property in page table information. When this property is set, the memory management circuitry returns the specified value X directly without accessing physical memory, thereby removing the need to physically store redundant identical values while maintaining the ability to provide the specified value on read.
Solution Approach 2:
Instead of physically copying and storing the specified value X in physical memory for each region, the patent creates a virtual copy through the read-as-X property flag in the page table. This flag causes the memory management circuitry to generate the value X on-demand during read operations, eliminating the need for actual physical duplication of data while maintaining the illusion of stored data.
2Reliability
If physical memory is allocated for regions with specified values, then reads can retrieve the stored value, but read latency increases due to unnecessary memory access
Solution Approach 1:
The patent performs preliminary action by setting the read-as-X property in the page table information before any read operations occur. This pre-configuration allows the memory management circuitry to immediately recognize that a read should return the specified value X without performing actual memory access, thereby eliminating read latency while ensuring correct value retrieval.
Solution Approach 2:
Instead of the conventional approach where read operations retrieve data from physical memory storage, the patent inverts the process by having the memory management circuitry generate the specified value X directly from the read-as-X property flag. This inversion eliminates the need for physical memory access during reads while ensuring the correct value is returned, thereby reducing latency without compromising correctness.
3Reliability
If physical memory is allocated for specified value regions, then the values are stored, but cache efficiency decreases due to unnecessary cache access requests
Solution Approach 1:
The patent extracts the cache access requirement from the read operation by introducing the read-as-X property. When this property is detected in the page table information, the memory management circuitry suppresses the generation of cache access requests entirely, returning the specified value X directly. This removes the unnecessary cache access overhead while maintaining the ability to provide the correct stored value.
Data Source
AI summary
Processing circuitry (4) performs data processing in response to instructions. Memory management circuitry (28) controls access to memory based on page table information capable of associating a given page of memory address space with a read-as-X property indicative that reads to an address in the given page of memory address space should be treated as returning a specified value X. In response to determining, for a read request issued to read a read target value for a read target block of memory address space, that at least part of the read target block corresponds to a page associated with the read-as-X property, the memory management circuitry (28) controls the specified value X to be returned to the processing circuitry (4) as at least part of the read target value. This enables large regions of memory address space to be treated as storing a specified value without needing to commit physical memory for those regions.